BETAINDF0
- Address
0x00- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF07
- 6INDF06
- 5INDF05
- 4INDF04
- 3INDF03
- 2INDF02
- 1INDF01
- 0INDF00
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF0 | 7:0 |
PIC16LF1507 registers
All 119 registers by peripheral, at their data-memory address as the register file map gives it (bank and offset), with their reset value and every bit.
CPU CPU core
INDF1
- Address
0x01- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF17
- 6INDF16
- 5INDF15
- 4INDF14
- 3INDF13
- 2INDF12
- 1INDF11
- 0INDF10
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF1 | 7:0 |
PCL
- Address
0x02- Reset
0x00- Access
- read/write
- 7PCL7
- 6PCL6
- 5PCL5
- 4PCL4
- 3PCL3
- 2PCL2
- 1PCL1
- 0PCL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCL | 7:0 |
STATUS
- Address
0x03- Reset
0x18- Access
- read/write
- 7–
- 6–
- 5–
- 4nTO
- 3nPD
- 2Z
- 1DC
- 0C
5 fields
| Field | Bits | What it does |
|---|---|---|
| nTO | 4 | |
| nPD | 3 | |
| Z | 2 | |
| DC | 1 | |
| C | 0 |
FSR0L
- Address
0x04- Reset
0x00- Access
- read/write
- 7FSR0L7
- 6FSR0L6
- 5FSR0L5
- 4FSR0L4
- 3FSR0L3
- 2FSR0L2
- 1FSR0L1
- 0FSR0L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L | 7:0 |
FSR0H
- Address
0x05- Reset
0x00- Access
- read/write
- 7FSR0H7
- 6FSR0H6
- 5FSR0H5
- 4FSR0H4
- 3FSR0H3
- 2FSR0H2
- 1FSR0H1
- 0FSR0H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H | 7:0 |
FSR1L
- Address
0x06- Reset
0x00- Access
- read/write
- 7FSR1L7
- 6FSR1L6
- 5FSR1L5
- 4FSR1L4
- 3FSR1L3
- 2FSR1L2
- 1FSR1L1
- 0FSR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L | 7:0 |
FSR1H
- Address
0x07- Reset
0x00- Access
- read/write
- 7FSR1H7
- 6FSR1H6
- 5FSR1H5
- 4FSR1H4
- 3FSR1H3
- 2FSR1H2
- 1FSR1H1
- 0FSR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H | 7:0 |
BSR
- Address
0x08- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4BSR4
- 3BSR3
- 2BSR2
- 1BSR1
- 0BSR0
1 field
| Field | Bits | What it does |
|---|---|---|
| BSR | 4:0 |
WREG
- Address
0x09- Reset
0x00- Access
- read/write
- 7WREG07
- 6WREG06
- 5WREG05
- 4WREG04
- 3WREG03
- 2WREG02
- 1WREG01
- 0WREG00
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG0 | 7:0 |
PCLATH
- Address
0x0A- Reset
0x00- Access
- read/write
- 7–
- 6PCLATH6
- 5PCLATH5
- 4PCLATH4
- 3PCLATH3
- 2PCLATH2
- 1PCLATH1
- 0PCLATH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH | 6:0 |
STATUS_SHAD
- Address
0xFE4- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2Z_SHAD
- 1DC_SHAD
- 0C_SHAD
3 fields
| Field | Bits | What it does |
|---|---|---|
| Z_SHAD | 2 | |
| DC_SHAD | 1 | |
| C_SHAD | 0 |
WREG_SHAD
- Address
0xFE5- Reset
x (not fixed at power-on)- Access
- read/write
- 7WREG_SHAD7
- 6WREG_SHAD6
- 5WREG_SHAD5
- 4WREG_SHAD4
- 3WREG_SHAD3
- 2WREG_SHAD2
- 1WREG_SHAD1
- 0WREG_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG_SHAD | 7:0 |
BSR_SHAD
- Address
0xFE6- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4BSR_SHAD4
- 3BSR_SHAD3
- 2BSR_SHAD2
- 1BSR_SHAD1
- 0BSR_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| BSR_SHAD | 4:0 |
PCLATH_SHAD
- Address
0xFE7- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6PCLATH_SHAD6
- 5PCLATH_SHAD5
- 4PCLATH_SHAD4
- 3PCLATH_SHAD3
- 2PCLATH_SHAD2
- 1PCLATH_SHAD1
- 0PCLATH_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH_SHAD | 6:0 |
FSR0L_SHAD
- Address
0xFE8- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0L_SHAD7
- 6FSR0L_SHAD6
- 5FSR0L_SHAD5
- 4FSR0L_SHAD4
- 3FSR0L_SHAD3
- 2FSR0L_SHAD2
- 1FSR0L_SHAD1
- 0FSR0L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L_SHAD | 7:0 |
FSR0H_SHAD
- Address
0xFE9- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0H_SHAD7
- 6FSR0H_SHAD6
- 5FSR0H_SHAD5
- 4FSR0H_SHAD4
- 3FSR0H_SHAD3
- 2FSR0H_SHAD2
- 1FSR0H_SHAD1
- 0FSR0H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H_SHAD | 7:0 |
FSR1L_SHAD
- Address
0xFEA- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1L_SHAD7
- 6FSR1L_SHAD6
- 5FSR1L_SHAD5
- 4FSR1L_SHAD4
- 3FSR1L_SHAD3
- 2FSR1L_SHAD2
- 1FSR1L_SHAD1
- 0FSR1L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L_SHAD | 7:0 |
FSR1H_SHAD
- Address
0xFEB- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1H_SHAD7
- 6FSR1H_SHAD6
- 5FSR1H_SHAD5
- 4FSR1H_SHAD4
- 3FSR1H_SHAD3
- 2FSR1H_SHAD2
- 1FSR1H_SHAD1
- 0FSR1H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H_SHAD | 7:0 |
STKPTRCurrent Stack pointer
- Address
0xFED- Reset
0x1F- Access
- read/write
- 7–
- 6–
- 5–
- 4STKPTR4
- 3STKPTR3
- 2STKPTR2
- 1STKPTR1
- 0STKPTR0
1 field
| Field | Bits | What it does |
|---|---|---|
| STKPTR | 4:0 |
TOSLTop of Stack Low byte
- Address
0xFEE- Reset
x (not fixed at power-on)- Access
- read/write
- 7TOSL7
- 6TOSL6
- 5TOSL5
- 4TOSL4
- 3TOSL3
- 2TOSL2
- 1TOSL1
- 0TOSL0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSL | 7:0 |
TOSHTop of Stack High byte
- Address
0xFEF- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6TOSH6
- 5TOSH5
- 4TOSH4
- 3TOSH3
- 2TOSH2
- 1TOSH1
- 0TOSH0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSH | 6:0 |
INTERRUPT Interrupts
INTCON
- Address
0x0B- Reset
x (not fixed at power-on)- Access
- read/write
- 7GIE
- 6PEIE
- 5TMR0IE
- 4INTE
- 3IOCIE
- 2TMR0IF
- 1INTF
- 0IOCIF
8 fields
| Field | Bits | What it does |
|---|---|---|
| GIE | 7 | |
| PEIE | 6 | |
| TMR0IE | 5 | |
| INTE | 4 | |
| IOCIE | 3 | |
| TMR0IF | 2 | |
| INTF | 1 | |
| IOCIF | 0 |
PIR1
- Address
0x11- Reset
0x00- Access
- read/write
- 7TMR1GIF
- 6ADIF
- 5–
- 4–
- 3–
- 2–
- 1TMR2IF
- 0TMR1IF
4 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GIF | 7 | Timer1 Gate Interrupt Flag bit |
| ADIF | 6 | A/D Converter Interrupt Flag bit |
| TMR2IF | 1 | TMR2 to PR2 Match Interrupt Flag bit |
| TMR1IF | 0 | TMR1 Overflow Interrupt Flag bit |
PIR2
- Address
0x12- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2NCO1IF
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1IF | 2 |
PIR3
- Address
0x13- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1CLC2IF
- 0CLC1IF
2 fields
| Field | Bits | What it does |
|---|---|---|
| CLC2IF | 1 | |
| CLC1IF | 0 |
PIE1Peripheral Interrupt Enable Register 1
- Address
0x91- Reset
0x00- Access
- read/write
- 7TMR1GIE
- 6ADIE
- 5–
- 4–
- 3–
- 2–
- 1TMR2IE
- 0TMR1IE
4 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GIE | 7 | Timer1 Gate Interrupt Enable bit |
| ADIE | 6 | A/D Converter Interrupt Enable bit |
| TMR2IE | 1 | TMR2 to PR2 Match Interrupt Enable bit |
| TMR1IE | 0 | TMR1 Overflow Interrupt Enable bit |
PIE2Peripheral Interrupt Enable Register 2
- Address
0x92- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2NCO1IE
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1IE | 2 |
PIE3Peripheral Interrupt Enable Register 3
- Address
0x93- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1CLC2IE
- 0CLC1IE
2 fields
| Field | Bits | What it does |
|---|---|---|
| CLC2IE | 1 | |
| CLC1IE | 0 |
PORTA I/O port A
PORTA
- Address
0x0C- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5RA5
- 4RA4
- 3RA3
- 2RA2
- 1RA1
- 0RA0
6 fields
| Field | Bits | What it does |
|---|---|---|
| RA5 | 5 | |
| RA4 | 4 | |
| RA3 | 3 | |
| RA2 | 2 | |
| RA1 | 1 | |
| RA0 | 0 |
TRISAPORTA Data Direction Control Register
- Address
0x8C- Reset
0x3F- Access
- read/write
- 7–
- 6–
- 5TRISA5
- 4TRISA4
- 3TRISA3
- 2TRISA2
- 1TRISA1
- 0TRISA0
6 fields
| Field | Bits | What it does |
|---|---|---|
| TRISA5 | 5 | |
| TRISA4 | 4 | |
| TRISA3 | 3 | |
| TRISA2 | 2 | |
| TRISA1 | 1 | |
| TRISA0 | 0 |
LATA
- Address
0x10C- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LATA5
- 4LATA4
- 3–
- 2LATA2
- 1LATA1
- 0LATA0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LATA5 | 5 | |
| LATA4 | 4 | |
| LATA2 | 2 | |
| LATA1 | 1 | |
| LATA0 | 0 |
ANSELA
- Address
0x18C- Reset
0x17- Access
- read/write
- 7–
- 6–
- 5–
- 4ANSA4
- 3–
- 2ANSA2
- 1ANSA1
- 0ANSA0
4 fields
| Field | Bits | What it does |
|---|---|---|
| ANSA4 | 4 | |
| ANSA2 | 2 | |
| ANSA1 | 1 | |
| ANSA0 | 0 |
WPUA
- Address
0x20C- Reset
0x3F- Access
- read/write
- 7–
- 6–
- 5WPUA5
- 4WPUA4
- 3WPUA3
- 2WPUA2
- 1WPUA1
- 0WPUA0
6 fields
| Field | Bits | What it does |
|---|---|---|
| WPUA5 | 5 | |
| WPUA4 | 4 | |
| WPUA3 | 3 | |
| WPUA2 | 2 | |
| WPUA1 | 1 | |
| WPUA0 | 0 |
PORTB I/O port B
PORTB
- Address
0x0D- Reset
x (not fixed at power-on)- Access
- read/write
- 7RB7
- 6RB6
- 5RB5
- 4RB4
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| RB7 | 7 | |
| RB6 | 6 | |
| RB5 | 5 | |
| RB4 | 4 |
TRISBPORTB Data Direction Control Register
- Address
0x8D- Reset
0xF0- Access
- read/write
- 7TRISB7
- 6TRISB6
- 5TRISB5
- 4TRISB4
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| TRISB7 | 7 | |
| TRISB6 | 6 | |
| TRISB5 | 5 | |
| TRISB4 | 4 |
LATB
- Address
0x10D- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATB7
- 6LATB6
- 5LATB5
- 4LATB4
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| LATB7 | 7 | |
| LATB6 | 6 | |
| LATB5 | 5 | |
| LATB4 | 4 |
ANSELB
- Address
0x18D- Reset
0x30- Access
- read/write
- 7–
- 6–
- 5ANSB5
- 4ANSB4
- 3–
- 2–
- 1–
- 0–
2 fields
| Field | Bits | What it does |
|---|---|---|
| ANSB5 | 5 | |
| ANSB4 | 4 |
WPUB
- Address
0x20D- Reset
0xF0- Access
- read/write
- 7WPUB7
- 6WPUB6
- 5WPUB5
- 4WPUB4
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| WPUB7 | 7 | |
| WPUB6 | 6 | |
| WPUB5 | 5 | |
| WPUB4 | 4 |
PORTC I/O port C
PORTC
- Address
0x0E- Reset
x (not fixed at power-on)- Access
- read/write
- 7RC7
- 6RC6
- 5RC5
- 4RC4
- 3RC3
- 2RC2
- 1RC1
- 0RC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RC7 | 7 | |
| RC6 | 6 | |
| RC5 | 5 | |
| RC4 | 4 | |
| RC3 | 3 | |
| RC2 | 2 | |
| RC1 | 1 | |
| RC0 | 0 |
TRISCPORTC Data Direction Control Register
- Address
0x8E- Reset
0xFF- Access
- read/write
- 7TRISC7
- 6TRISC6
- 5TRISC5
- 4TRISC4
- 3TRISC3
- 2TRISC2
- 1TRISC1
- 0TRISC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISC7 | 7 | |
| TRISC6 | 6 | |
| TRISC5 | 5 | |
| TRISC4 | 4 | |
| TRISC3 | 3 | |
| TRISC2 | 2 | |
| TRISC1 | 1 | |
| TRISC0 | 0 |
LATC
- Address
0x10E- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATC7
- 6LATC6
- 5LATC5
- 4LATC4
- 3LATC3
- 2LATC2
- 1LATC1
- 0LATC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATC7 | 7 | |
| LATC6 | 6 | |
| LATC5 | 5 | |
| LATC4 | 4 | |
| LATC3 | 3 | |
| LATC2 | 2 | |
| LATC1 | 1 | |
| LATC0 | 0 |
ANSELC
- Address
0x18E- Reset
0xCF- Access
- read/write
- 7ANSC7
- 6ANSC6
- 5–
- 4–
- 3ANSC3
- 2ANSC2
- 1ANSC1
- 0ANSC0
6 fields
| Field | Bits | What it does |
|---|---|---|
| ANSC7 | 7 | |
| ANSC6 | 6 | |
| ANSC3 | 3 | |
| ANSC2 | 2 | |
| ANSC1 | 1 | |
| ANSC0 | 0 |
TMR0 Timer0
TMR0
- Address
0x15- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR07
- 6TMR06
- 5TMR05
- 4TMR04
- 3TMR03
- 2TMR02
- 1TMR01
- 0TMR00
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR0 | 7:0 |
OPTION_REGOption Register
- Address
0x95- Reset
0xFF- Access
- read/write
- 7nWPUEN
- 6INTEDG
- 5TMR0CS
- 4TMR0SE
- 3PSA
- 2PS2
- 1PS1
- 0PS0
6 fields
| Field | Bits | What it does |
|---|---|---|
| nWPUEN | 7 | Weak Pull-up Enable bit |
| INTEDG | 6 | Interrupt Edge Select bit |
| TMR0CS | 5 | |
| TMR0SE | 4 | TMR0 Source Edge Select bit |
| PSA | 3 | Prescaler Active bit |
| PS | 2:0 |
TMR1 Timer1
TMR1L
- Address
0x16- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1L7
- 6TMR1L6
- 5TMR1L5
- 4TMR1L4
- 3TMR1L3
- 2TMR1L2
- 1TMR1L1
- 0TMR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR1L | 7:0 |
TMR1H
- Address
0x17- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1H7
- 6TMR1H6
- 5TMR1H5
- 4TMR1H4
- 3TMR1H3
- 2TMR1H2
- 1TMR1H1
- 0TMR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR1H | 7:0 |
T1CON
- Address
0x18- Reset
0x00- Access
- read/write
- 7TMR1CS1
- 6TMR1CS0
- 5T1CKPS1
- 4T1CKPS0
- 3T1OSCEN
- 2nT1SYNC
- 1–
- 0TMR1ON
5 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1CS | 7:6 | |
| T1CKPS | 5:4 | |
| T1OSCEN | 3 | |
| nT1SYNC | 2 | |
| TMR1ON | 0 |
T1GCON
- Address
0x19- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1GE
- 6T1GPOL
- 5T1GTM
- 4T1GSPM
- 3T1GGO_nDONE
- 2T1GVAL
- 1T1GSS1
- 0T1GSS0
7 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GE | 7 | |
| T1GPOL | 6 | |
| T1GTM | 5 | |
| T1GSPM | 4 | |
| T1GGO_nDONE | 3 | |
| T1GVAL | 2 | |
| T1GSS | 1:0 |
TMR2 Timer2
TMR2
- Address
0x1A- Reset
0x00- Access
- read/write
- 7TMR27
- 6TMR26
- 5TMR25
- 4TMR24
- 3TMR23
- 2TMR22
- 1TMR21
- 0TMR20
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR2 | 7:0 |
PR2
- Address
0x1B- Reset
0xFF- Access
- read/write
- 7PR27
- 6PR26
- 5PR25
- 4PR24
- 3PR23
- 2PR22
- 1PR21
- 0PR20
1 field
| Field | Bits | What it does |
|---|---|---|
| PR2 | 7:0 |
T2CON
- Address
0x1C- Reset
0x00- Access
- read/write
- 7–
- 6T2OUTPS3
- 5T2OUTPS2
- 4T2OUTPS1
- 3T2OUTPS0
- 2TMR2ON
- 1T2CKPS1
- 0T2CKPS0
3 fields
| Field | Bits | What it does |
|---|---|---|
| T2OUTPS | 6:3 | |
| TMR2ON | 2 | |
| T2CKPS | 1:0 |
OSCILLATOR Oscillator, power control and watchdog
PCONPower Control Register
- Address
0x96- Reset
x (not fixed at power-on)- Access
- read/write
- 7STKOVF
- 6STKUNF
- 5–
- 4nRWDT
- 3nRMCLR
- 2nRI
- 1nPOR
- 0nBOR
7 fields
| Field | Bits | What it does |
|---|---|---|
| STKOVF | 7 | Stack Overflow Flag bit |
| STKUNF | 6 | Stack Underflow Flag bit |
| nRWDT | 4 | |
| nRMCLR | 3 | MCLR Reset Flag bit |
| nRI | 2 | RESET Instruction Flag bit |
| nPOR | 1 | Power-on Reset Status bit |
| nBOR | 0 | Brown-out Reset Status bit |
WDTCONWatchdog Timer Control Register
- Address
0x97- Reset
0x16- Access
- read/write
- 7–
- 6–
- 5WDTPS4
- 4WDTPS3
- 3WDTPS2
- 2WDTPS1
- 1WDTPS0
- 0SWDTEN
2 fields
| Field | Bits | What it does |
|---|---|---|
| WDTPS | 5:1 | |
| SWDTEN | 0 | Software Enable/Disable for Watch Dog Timer bit |
OSCCONOscillator Control Register
- Address
0x99- Reset
0x38- Access
- read/write
- 7–
- 6IRCF3
- 5IRCF2
- 4IRCF1
- 3IRCF0
- 2–
- 1SCS1
- 0SCS0
2 fields
| Field | Bits | What it does |
|---|---|---|
| IRCF | 6:3 | |
| SCS | 1:0 |
OSCSTATOscillator Status Register
- Address
0x9A- Reset
x (not fixed at power-on)- Access
- read only
- 7SOSCR
- 6–
- 5OSTS
- 4HFIOFR
- 3–
- 2–
- 1LFIOFR
- 0HFIOFS
5 fields
| Field | Bits | What it does |
|---|---|---|
| SOSCR | 7 | |
| OSTS | 5 | Oscillator Start-up Time-out Status bit |
| HFIOFR | 4 | |
| LFIOFR | 1 | Low Freqency Internal Oscillator Ready bit |
| HFIOFS | 0 | Low Freqency Internal Oscillator Ready bit |
BORCONBrown-out Reset Control Register
- Address
0x116- Reset
x (not fixed at power-on)- Access
- read/write
- 7SBOREN
- 6BORFS
- 5–
- 4–
- 3–
- 2–
- 1–
- 0BORRDY
3 fields
| Field | Bits | What it does |
|---|---|---|
| SBOREN | 7 | Software Brown Out Reset Enable bit |
| BORFS | 6 | |
| BORRDY | 0 | Brown-out Reset Circuit Ready Status bit |
ADC Analog-to-digital converter
ADRESLA/D Result Register LSB
- Address
0x9B- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESL7
- 6ADRESL6
- 5ADRESL5
- 4ADRESL4
- 3ADRESL3
- 2ADRESL2
- 1ADRESL1
- 0ADRESL0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESL | 7:0 |
ADRESHA/D Result Register MSB
- Address
0x9C- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESH7
- 6ADRESH6
- 5ADRESH5
- 4ADRESH4
- 3ADRESH3
- 2ADRESH2
- 1ADRESH1
- 0ADRESH0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESH | 7:0 |
ADCON0Analog-to-Digital Control Register 0
- Address
0x9D- Reset
0x00- Access
- read/write
- 7–
- 6CHS4
- 5CHS3
- 4CHS2
- 3CHS1
- 2CHS0
- 1GO/nDONE
- 0ADON
3 fields
| Field | Bits | What it does |
|---|---|---|
| CHS | 6:2 | |
| GO/nDONE | 1 | A/D Conversion Status bit |
| ADON | 0 | A/D Module Enable bit |
ADCON1Analog-to-Digital Control Register 1
- Address
0x9E- Reset
0x00- Access
- read/write
- 7ADFM
- 6ADCS2
- 5ADCS1
- 4ADCS0
- 3–
- 2–
- 1ADPREF1
- 0ADPREF0
3 fields
| Field | Bits | What it does |
|---|---|---|
| ADFM | 7 | A/D Result Format Select bit |
| ADCS | 6:4 | |
| ADPREF | 1:0 |
ADCON2Analog-to-Digital Control Register 2
- Address
0x9F- Reset
0x00- Access
- read/write
- 7TRIGSEL3
- 6TRIGSEL2
- 5TRIGSEL1
- 4TRIGSEL0
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| TRIGSEL | 7:4 |
FVR Fixed voltage reference
FVRCONVoltage Reference Control Register 0
- Address
0x117- Reset
x (not fixed at power-on)- Access
- read/write
- 7FVREN
- 6FVRRDY
- 5TSEN
- 4TSRNG
- 3–
- 2–
- 1ADFVR1
- 0ADFVR0
5 fields
| Field | Bits | What it does |
|---|---|---|
| FVREN | 7 | Fixed Voltage Reference Enable |
| FVRRDY | 6 | Fixed Voltage Reference Ready Flag |
| TSEN | 5 | Temperature Sensor Enable |
| TSRNG | 4 | Temperature Sensor Range Select |
| ADFVR | 1:0 | A/D Converter Fixed Voltage Reference Selection |
PORTS I/O port control
APFCONAlternate Pin Function Control Register
- Address
0x11D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1CLC1SEL
- 0NCO1SEL
2 fields
| Field | Bits | What it does |
|---|---|---|
| CLC1SEL | 1 | |
| NCO1SEL | 0 |
NVM Data EEPROM and flash program memory
PMADRL
- Address
0x191- Reset
0x00- Access
- read/write
- 7PMADRL7
- 6PMADRL6
- 5PMADRL5
- 4PMADRL4
- 3PMADRL3
- 2PMADRL2
- 1PMADRL1
- 0PMADRL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMADRL | 7:0 |
PMADRH
- Address
0x192- Reset
0x80- Access
- read/write
- 7–
- 6PMADRH6
- 5PMADRH5
- 4PMADRH4
- 3PMADRH3
- 2PMADRH2
- 1PMADRH1
- 0PMADRH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMADRH | 6:0 |
PMDATL
- Address
0x193- Reset
x (not fixed at power-on)- Access
- read/write
- 7PMDATL7
- 6PMDATL6
- 5PMDATL5
- 4PMDATL4
- 3PMDATL3
- 2PMDATL2
- 1PMDATL1
- 0PMDATL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMDATL | 7:0 |
PMDATH
- Address
0x194- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5PMDATH5
- 4PMDATH4
- 3PMDATH3
- 2PMDATH2
- 1PMDATH1
- 0PMDATH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMDATH | 5:0 |
PMCON1
- Address
0x195- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6CFGS
- 5LWLO
- 4FREE
- 3WRERR
- 2WREN
- 1WR
- 0RD
7 fields
| Field | Bits | What it does |
|---|---|---|
| CFGS | 6 | FLASH Program / Configuration Select bit |
| LWLO | 5 | Load Write Latches Only bit |
| FREE | 4 | Program FLASH Erase Enable bit |
| WRERR | 3 | Sequence Error Flag bit |
| WREN | 2 | Program/Erase Enable bit |
| WR | 1 | Write Control bit |
| RD | 0 | Read Control bit |
PMCON2
- Address
0x196- Reset
0x00- Access
- write only
- 7PMCON27
- 6PMCON26
- 5PMCON25
- 4PMCON24
- 3PMCON23
- 2PMCON22
- 1PMCON21
- 0PMCON20
1 field
| Field | Bits | What it does |
|---|---|---|
| PMCON2 | 7:0 |
IOC Interrupt-on-change
IOCAP
- Address
0x391- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5IOCAP5
- 4IOCAP4
- 3IOCAP3
- 2IOCAP2
- 1IOCAP1
- 0IOCAP0
6 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAP5 | 5 | |
| IOCAP4 | 4 | |
| IOCAP3 | 3 | |
| IOCAP2 | 2 | |
| IOCAP1 | 1 | |
| IOCAP0 | 0 |
IOCAN
- Address
0x392- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5IOCAN5
- 4IOCAN4
- 3IOCAN3
- 2IOCAN2
- 1IOCAN1
- 0IOCAN0
6 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAN5 | 5 | |
| IOCAN4 | 4 | |
| IOCAN3 | 3 | |
| IOCAN2 | 2 | |
| IOCAN1 | 1 | |
| IOCAN0 | 0 |
IOCAF
- Address
0x393- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5IOCAF5
- 4IOCAF4
- 3IOCAF3
- 2IOCAF2
- 1IOCAF1
- 0IOCAF0
6 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAF5 | 5 | |
| IOCAF4 | 4 | |
| IOCAF3 | 3 | |
| IOCAF2 | 2 | |
| IOCAF1 | 1 | |
| IOCAF0 | 0 |
IOCBPInterrupt-On-Change Positive Edge Register
- Address
0x394- Reset
0x00- Access
- read/write
- 7IOCBP7
- 6IOCBP6
- 5IOCBP5
- 4IOCBP4
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBP7 | 7 | |
| IOCBP6 | 6 | |
| IOCBP5 | 5 | |
| IOCBP4 | 4 |
IOCBNInterrupt-On-Change Negative Edge Register
- Address
0x395- Reset
0x00- Access
- read/write
- 7IOCBN7
- 6IOCBN6
- 5IOCBN5
- 4IOCBN4
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBN7 | 7 | |
| IOCBN6 | 6 | |
| IOCBN5 | 5 | |
| IOCBN4 | 4 |
IOCBFInterrupt-On-Change Flag Register
- Address
0x396- Reset
0x00- Access
- read/write
- 7IOCBF7
- 6IOCBF6
- 5IOCBF5
- 4IOCBF4
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBF7 | 7 | |
| IOCBF6 | 6 | |
| IOCBF5 | 5 | |
| IOCBF4 | 4 |
NCO1 Numerically controlled oscillator 1
NCO1ACCL
- Address
0x498- Reset
0x00- Access
- read/write
- 7NCO1ACC7
- 6NCO1ACC6
- 5NCO1ACC5
- 4NCO1ACC4
- 3NCO1ACC3
- 2NCO1ACC2
- 1NCO1ACC1
- 0NCO1ACC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| NCO1ACC7 | 7 | |
| NCO1ACC6 | 6 | |
| NCO1ACC5 | 5 | |
| NCO1ACC4 | 4 | |
| NCO1ACC3 | 3 | |
| NCO1ACC2 | 2 | |
| NCO1ACC1 | 1 | |
| NCO1ACC0 | 0 |
NCO1ACCH
- Address
0x499- Reset
0x00- Access
- read/write
- 7NCO1ACC15
- 6NCO1ACC14
- 5NCO1ACC13
- 4NCO1ACC12
- 3NCO1ACC11
- 2NCO1ACC10
- 1NCO1ACC9
- 0NCO1ACC8
8 fields
| Field | Bits | What it does |
|---|---|---|
| NCO1ACC15 | 7 | |
| NCO1ACC14 | 6 | |
| NCO1ACC13 | 5 | |
| NCO1ACC12 | 4 | |
| NCO1ACC11 | 3 | |
| NCO1ACC10 | 2 | |
| NCO1ACC9 | 1 | |
| NCO1ACC8 | 0 |
NCO1ACCU
- Address
0x49A- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3NCO1ACC19
- 2NCO1ACC18
- 1NCO1ACC17
- 0NCO1ACC16
4 fields
| Field | Bits | What it does |
|---|---|---|
| NCO1ACC19 | 3 | |
| NCO1ACC18 | 2 | |
| NCO1ACC17 | 1 | |
| NCO1ACC16 | 0 |
NCO1INCL
- Address
0x49B- Reset
0x01- Access
- read/write
- 7NCO1INC7
- 6NCO1INC6
- 5NCO1INC5
- 4NCO1INC4
- 3NCO1INC3
- 2NCO1INC2
- 1NCO1INC1
- 0NCO1INC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| NCO1INC7 | 7 | |
| NCO1INC6 | 6 | |
| NCO1INC5 | 5 | |
| NCO1INC4 | 4 | |
| NCO1INC3 | 3 | |
| NCO1INC2 | 2 | |
| NCO1INC1 | 1 | |
| NCO1INC0 | 0 |
NCO1INCH
- Address
0x49C- Reset
0x00- Access
- read/write
- 7NCO1INC15
- 6NCO1INC14
- 5NCO1INC13
- 4NCO1INC12
- 3NCO1INC11
- 2NCO1INC10
- 1NCO1INC9
- 0NCO1INC8
8 fields
| Field | Bits | What it does |
|---|---|---|
| NCO1INC15 | 7 | |
| NCO1INC14 | 6 | |
| NCO1INC13 | 5 | |
| NCO1INC12 | 4 | |
| NCO1INC11 | 3 | |
| NCO1INC10 | 2 | |
| NCO1INC9 | 1 | |
| NCO1INC8 | 0 |
NCO1INCU
- Address
0x49D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
NCO1CONConfigurable logic cell control
- Address
0x49E- Reset
0x00- Access
- read/write
- 7N1EN
- 6N1OE
- 5N1OUT
- 4N1POL
- 3–
- 2–
- 1–
- 0N1PFM
5 fields
| Field | Bits | What it does |
|---|---|---|
| N1EN | 7 | |
| N1OE | 6 | |
| N1OUT | 5 | |
| N1POL | 4 | |
| N1PFM | 0 |
NCO1CLK
- Address
0x49F- Reset
0x00- Access
- read/write
- 7N1PWS2
- 6N1PWS1
- 5N1PWS0
- 4–
- 3–
- 2–
- 1N1CKS1
- 0N1CKS0
2 fields
| Field | Bits | What it does |
|---|---|---|
| N1PWS | 7:5 | |
| N1CKS | 1:0 |
ECCP1 Enhanced capture/compare/PWM 1
PWM1DCL
- Address
0x611- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM1DCL1
- 6PWM1DCL0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM1DCL | 7:6 |
PWM1DCH
- Address
0x612- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM1DCH7
- 6PWM1DCH6
- 5PWM1DCH5
- 4PWM1DCH4
- 3PWM1DCH3
- 2PWM1DCH2
- 1PWM1DCH1
- 0PWM1DCH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM1DCH | 7:0 |
PWM1CONConfigurable logic cell control
- Address
0x613- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM1EN
- 6PWM1OE
- 5PWM1OUT
- 4PWM1POL
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| PWM1EN | 7 | |
| PWM1OE | 6 | |
| PWM1OUT | 5 | |
| PWM1POL | 4 |
ECCP2 Enhanced capture/compare/PWM 2
PWM2DCL
- Address
0x614- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM2DCL1
- 6PWM2DCL0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM2DCL | 7:6 |
PWM2DCH
- Address
0x615- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM2DCH7
- 6PWM2DCH6
- 5PWM2DCH5
- 4PWM2DCH4
- 3PWM2DCH3
- 2PWM2DCH2
- 1PWM2DCH1
- 0PWM2DCH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM2DCH | 7:0 |
PWM2CONConfigurable logic cell control
- Address
0x616- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM2EN
- 6PWM2OE
- 5PWM2OUT
- 4PWM2POL
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| PWM2EN | 7 | |
| PWM2OE | 6 | |
| PWM2OUT | 5 | |
| PWM2POL | 4 |
ECCP3 Enhanced capture/compare/PWM 3
PWM3DCL
- Address
0x617- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM3DCL1
- 6PWM3DCL0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM3DCL | 7:6 |
PWM3DCH
- Address
0x618- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM3DCH7
- 6PWM3DCH6
- 5PWM3DCH5
- 4PWM3DCH4
- 3PWM3DCH3
- 2PWM3DCH2
- 1PWM3DCH1
- 0PWM3DCH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM3DCH | 7:0 |
PWM3CONConfigurable logic cell control
- Address
0x619- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM3EN
- 6PWM3OE
- 5PWM3OUT
- 4PWM3POL
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| PWM3EN | 7 | |
| PWM3OE | 6 | |
| PWM3OUT | 5 | |
| PWM3POL | 4 |
ECCP4 Enhanced capture/compare/PWM 4
PWM4DCL
- Address
0x61A- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM4DCL1
- 6PWM4DCL0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM4DCL | 7:6 |
PWM4DCH
- Address
0x61B- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM4DCH7
- 6PWM4DCH6
- 5PWM4DCH5
- 4PWM4DCH4
- 3PWM4DCH3
- 2PWM4DCH2
- 1PWM4DCH1
- 0PWM4DCH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM4DCH | 7:0 |
PWM4CONConfigurable logic cell control
- Address
0x61C- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM4EN
- 6PWM4OE
- 5PWM4OUT
- 4PWM4POL
- 3–
- 2–
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| PWM4EN | 7 | |
| PWM4OE | 6 | |
| PWM4OUT | 5 | |
| PWM4POL | 4 |
CWG1 Complementary waveform generator 1
CWG1DBR
- Address
0x691- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5CWG1DBR5
- 4CWG1DBR4
- 3CWG1DBR3
- 2CWG1DBR2
- 1CWG1DBR1
- 0CWG1DBR0
1 field
| Field | Bits | What it does |
|---|---|---|
| CWG1DBR | 5:0 |
CWG1DBF
- Address
0x692- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5CWG1DBF5
- 4CWG1DBF4
- 3CWG1DBF3
- 2CWG1DBF2
- 1CWG1DBF1
- 0CWG1DBF0
1 field
| Field | Bits | What it does |
|---|---|---|
| CWG1DBF | 5:0 |
CWG1CON0Configurable logic cell control
- Address
0x693- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1EN
- 6G1OEB
- 5G1OEA
- 4G1POLB
- 3G1POLA
- 2–
- 1–
- 0G1CS0
6 fields
| Field | Bits | What it does |
|---|---|---|
| G1EN | 7 | |
| G1OEB | 6 | |
| G1OEA | 5 | |
| G1POLB | 4 | |
| G1POLA | 3 | |
| G1CS0 | 0 |
CWG1CON1
- Address
0x694- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1ASDLB1
- 6G1ASDLB0
- 5G1ASDLA1
- 4G1ASDLA0
- 3–
- 2G1IS2
- 1G1IS1
- 0G1IS0
5 fields
| Field | Bits | What it does |
|---|---|---|
| G1ASDLB | 7:6 | |
| G1ASDLA | 5:4 | |
| G1IS2 | 2 | |
| G1IS1 | 1 | |
| G1IS0 | 0 |
CWG1CON2
- Address
0x695- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1ASE
- 6G1ARSEN
- 5–
- 4–
- 3–
- 2–
- 1G1ASDSFLT
- 0G1ASDSCLC2
4 fields
| Field | Bits | What it does |
|---|---|---|
| G1ASE | 7 | |
| G1ARSEN | 6 | |
| G1ASDSFLT | 1 | |
| G1ASDSCLC2 | 0 |
CLC Configurable logic cell
CLCDATA
- Address
0xF0F- Reset
0x00- Access
- read only
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1MCLC2OUT
- 0MCLC1OUT
2 fields
| Field | Bits | What it does |
|---|---|---|
| MCLC2OUT | 1 | |
| MCLC1OUT | 0 |
CLC1CONConfigurable logic cell control
- Address
0xF10- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1EN
- 6LC1OE
- 5LC1OUT
- 4LC1INTP
- 3LC1INTN
- 2LC1MODE2
- 1LC1MODE1
- 0LC1MODE0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1EN | 7 | |
| LC1OE | 6 | |
| LC1OUT | 5 | |
| LC1INTP | 4 | |
| LC1INTN | 3 | |
| LC1MODE2 | 2 | |
| LC1MODE1 | 1 | |
| LC1MODE0 | 0 |
CLC1POLPolarity control
- Address
0xF11- Reset
0x00- Access
- read/write
- 7LC1POL
- 6–
- 5–
- 4–
- 3LC1G4POL
- 2LC1G3POL
- 1LC1G2POL
- 0LC1G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC1POL | 7 | |
| LC1G4POL | 3 | |
| LC1G3POL | 2 | |
| LC1G2POL | 1 | |
| LC1G1POL | 0 |
CLC1SEL0Input select register 0
- Address
0xF12- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6LC1D2S2
- 5LC1D2S1
- 4LC1D2S0
- 3–
- 2LC1D1S2
- 1LC1D1S1
- 0LC1D1S0
6 fields
| Field | Bits | What it does |
|---|---|---|
| LC1D2S2 | 6 | |
| LC1D2S1 | 5 | |
| LC1D2S0 | 4 | |
| LC1D1S2 | 2 | |
| LC1D1S1 | 1 | |
| LC1D1S0 | 0 |
CLC1SEL1Input select register 1
- Address
0xF13- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6LC1D4S2
- 5LC1D4S1
- 4LC1D4S0
- 3–
- 2LC1D3S2
- 1LC1D3S1
- 0LC1D3S0
6 fields
| Field | Bits | What it does |
|---|---|---|
| LC1D4S2 | 6 | |
| LC1D4S1 | 5 | |
| LC1D4S0 | 4 | |
| LC1D3S2 | 2 | |
| LC1D3S1 | 1 | |
| LC1D3S0 | 0 |
CLC1GLS0Gate logic select register 0
- Address
0xF14- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G1D4T
- 6LC1G1D4N
- 5LC1G1D3T
- 4LC1G1D3N
- 3LC1G1D2T
- 2LC1G1D2N
- 1LC1G1D1T
- 0LC1G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G1D4T | 7 | |
| LC1G1D4N | 6 | |
| LC1G1D3T | 5 | |
| LC1G1D3N | 4 | |
| LC1G1D2T | 3 | |
| LC1G1D2N | 2 | |
| LC1G1D1T | 1 | |
| LC1G1D1N | 0 |
CLC1GLS1Gate logic select register 1
- Address
0xF15- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G2D4T
- 6LC1G2D4N
- 5LC1G2D3T
- 4LC1G2D3N
- 3LC1G2D2T
- 2LC1G2D2N
- 1LC1G2D1T
- 0LC1G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G2D4T | 7 | |
| LC1G2D4N | 6 | |
| LC1G2D3T | 5 | |
| LC1G2D3N | 4 | |
| LC1G2D2T | 3 | |
| LC1G2D2N | 2 | |
| LC1G2D1T | 1 | |
| LC1G2D1N | 0 |
CLC1GLS2Gate logic select register 2
- Address
0xF16- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G3D4T
- 6LC1G3D4N
- 5LC1G3D3T
- 4LC1G3D3N
- 3LC1G3D2T
- 2LC1G3D2N
- 1LC1G3D1T
- 0LC1G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G3D4T | 7 | |
| LC1G3D4N | 6 | |
| LC1G3D3T | 5 | |
| LC1G3D3N | 4 | |
| LC1G3D2T | 3 | |
| LC1G3D2N | 2 | |
| LC1G3D1T | 1 | |
| LC1G3D1N | 0 |
CLC1GLS3Gate logic select register 3
- Address
0xF17- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G4D4T
- 6LC1G4D4N
- 5LC1G4D3T
- 4LC1G4D3N
- 3LC1G4D2T
- 2LC1G4D2N
- 1LC1G4D1T
- 0LC1G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G4D4T | 7 | |
| LC1G4D4N | 6 | |
| LC1G4D3T | 5 | |
| LC1G4D3N | 4 | |
| LC1G4D2T | 3 | |
| LC1G4D2N | 2 | |
| LC1G4D1T | 1 | |
| LC1G4D1N | 0 |
CLC2CONConfigurable logic cell control
- Address
0xF18- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2EN
- 6LC2OE
- 5LC2OUT
- 4LC2INTP
- 3LC2INTN
- 2LC2MODE2
- 1LC2MODE1
- 0LC2MODE0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2EN | 7 | |
| LC2OE | 6 | |
| LC2OUT | 5 | |
| LC2INTP | 4 | |
| LC2INTN | 3 | |
| LC2MODE2 | 2 | |
| LC2MODE1 | 1 | |
| LC2MODE0 | 0 |
CLC2POLPolarity control
- Address
0xF19- Reset
0x00- Access
- read/write
- 7LC2POL
- 6–
- 5–
- 4–
- 3LC2G4POL
- 2LC2G3POL
- 1LC2G2POL
- 0LC2G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC2POL | 7 | |
| LC2G4POL | 3 | |
| LC2G3POL | 2 | |
| LC2G2POL | 1 | |
| LC2G1POL | 0 |
CLC2SEL0Input select register 0
- Address
0xF1A- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6LC2D2S2
- 5LC2D2S1
- 4LC2D2S0
- 3–
- 2LC2D1S2
- 1LC2D1S1
- 0LC2D1S0
6 fields
| Field | Bits | What it does |
|---|---|---|
| LC2D2S2 | 6 | |
| LC2D2S1 | 5 | |
| LC2D2S0 | 4 | |
| LC2D1S2 | 2 | |
| LC2D1S1 | 1 | |
| LC2D1S0 | 0 |
CLC2SEL1Input select register 1
- Address
0xF1B- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6LC2D4S2
- 5LC2D4S1
- 4LC2D4S0
- 3–
- 2LC2D3S2
- 1LC2D3S1
- 0LC2D3S0
6 fields
| Field | Bits | What it does |
|---|---|---|
| LC2D4S2 | 6 | |
| LC2D4S1 | 5 | |
| LC2D4S0 | 4 | |
| LC2D3S2 | 2 | |
| LC2D3S1 | 1 | |
| LC2D3S0 | 0 |
CLC2GLS0Gate logic select register 0
- Address
0xF1C- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G1D4T
- 6LC2G1D4N
- 5LC2G1D3T
- 4LC2G1D3N
- 3LC2G1D2T
- 2LC2G1D2N
- 1LC2G1D1T
- 0LC2G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G1D4T | 7 | |
| LC2G1D4N | 6 | |
| LC2G1D3T | 5 | |
| LC2G1D3N | 4 | |
| LC2G1D2T | 3 | |
| LC2G1D2N | 2 | |
| LC2G1D1T | 1 | |
| LC2G1D1N | 0 |
CLC2GLS1Gate logic select register 1
- Address
0xF1D- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G2D4T
- 6LC2G2D4N
- 5LC2G2D3T
- 4LC2G2D3N
- 3LC2G2D2T
- 2LC2G2D2N
- 1LC2G2D1T
- 0LC2G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G2D4T | 7 | |
| LC2G2D4N | 6 | |
| LC2G2D3T | 5 | |
| LC2G2D3N | 4 | |
| LC2G2D2T | 3 | |
| LC2G2D2N | 2 | |
| LC2G2D1T | 1 | |
| LC2G2D1N | 0 |
CLC2GLS2Gate logic select register 2
- Address
0xF1E- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G3D4T
- 6LC2G3D4N
- 5LC2G3D3T
- 4LC2G3D3N
- 3LC2G3D2T
- 2LC2G3D2N
- 1LC2G3D1T
- 0LC2G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G3D4T | 7 | |
| LC2G3D4N | 6 | |
| LC2G3D3T | 5 | |
| LC2G3D3N | 4 | |
| LC2G3D2T | 3 | |
| LC2G3D2N | 2 | |
| LC2G3D1T | 1 | |
| LC2G3D1N | 0 |
CLC2GLS3Gate logic select register 3
- Address
0xF1F- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G4D4T
- 6LC2G4D4N
- 5LC2G4D3T
- 4LC2G4D3N
- 3LC2G4D2T
- 2LC2G4D2N
- 1LC2G4D1T
- 0LC2G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G4D4T | 7 | |
| LC2G4D4N | 6 | |
| LC2G4D3T | 5 | |
| LC2G4D3N | 4 | |
| LC2G4D2T | 3 | |
| LC2G4D2N | 2 | |
| LC2G4D1T | 1 | |
| LC2G4D1N | 0 |
SFR Other special function registers
BSR_ICDSHAD
- Address
0xFE3- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4BSR_ICDSHAD4
- 3BSR_ICDSHAD3
- 2BSR_ICDSHAD2
- 1BSR_ICDSHAD1
- 0BSR_ICDSHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| BSR_ICDSHAD | 4:0 |