74HC14Hex Schmitt-trigger inverter
Turn a slow, noisy edge into a clean logic transition.
74HC14 contains six independent inverting Schmitt-trigger gates in a 14-pin IC. Each gate accepts a changing input voltage and produces a digital output. The input uses a higher threshold for a rising voltage and a lower threshold for a falling voltage. Between those thresholds, the output remembers its previous state instead of switching repeatedly. This page covers SN74HC14N and SN74HC14D. The 4.5 V example uses the manufacturer’s typical thresholds to explain hysteresis and a filtered push-button input.
Click a lead or use the arrow keys. Top view
1A
Function
Input of inverter 1, with separate rising and falling switching thresholds.
How to connect
Connect to the RC switch node.
Electrical note
Do not leave a CMOS input floating.
1Y
Function
Output of inverter 1. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−.
How to connect
Connect through 1 kΩ to the LED anode; cathode goes to GND.
Electrical note
Between thresholds, the previous state is retained.
2A
Function
Input of inverter 2, with separate rising and falling switching thresholds.
How to connect
Tie LOW if unused.
Electrical note
Do not leave a CMOS input floating.
2Y
Function
Output of inverter 2. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−.
How to connect
Leave unconnected if unused.
Electrical note
Between thresholds, the previous state is retained.
3A
Function
Input of inverter 3, with separate rising and falling switching thresholds.
How to connect
Tie LOW if unused.
Electrical note
Do not leave a CMOS input floating.
3Y
Function
Output of inverter 3. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−.
How to connect
Leave unconnected if unused.
Electrical note
Between thresholds, the previous state is retained.
GND
Function
Supply return for all six gates.
How to connect
Connect to the supply negative and capacitor returns.
4Y
Function
Output of inverter 4. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−.
How to connect
Leave unconnected if unused.
Electrical note
Between thresholds, the previous state is retained.
4A
Function
Input of inverter 4, with separate rising and falling switching thresholds.
How to connect
Tie LOW if unused.
Electrical note
Do not leave a CMOS input floating.
5Y
Function
Output of inverter 5. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−.
How to connect
Leave unconnected if unused.
Electrical note
Between thresholds, the previous state is retained.
5A
Function
Input of inverter 5, with separate rising and falling switching thresholds.
How to connect
Tie LOW if unused.
Electrical note
Do not leave a CMOS input floating.
6Y
Function
Output of inverter 6. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−.
How to connect
Leave unconnected if unused.
Electrical note
Between thresholds, the previous state is retained.
6A
Function
Input of inverter 6, with separate rising and falling switching thresholds.
How to connect
Tie LOW if unused.
Electrical note
Do not leave a CMOS input floating.
VCC
Function
Supply for all six gates.
How to connect
Use +4.5 V in this threshold example, with 100 nF bypass to pin 7.
Electrical note
Recommended range 2–6 V. Thresholds vary with supply.
At a glance
Hex Schmitt-trigger inverter
Hysteresis gives the input a memory band. The same intermediate voltage can correspond to either output state, depending on the previous transition.
Operating profile
SN74HC14N
Operating conditions
Key parameters and their test conditions
- Supply
- 2–6 VConditions / notes: Nominal 5 V; this example uses 4.5 V
- Input voltage
- 0 to VCCConditions / notes: Normal operating range
- Ambient temperature
- −40 to +85°CConditions / notes: SN74HC14 grade
- Unused inputs
- Tie to a defined LOW or HIGHConditions / notes: Unused outputs may be left unconnected
- Supply bypass
- 100 nFConditions / notes: Place close to VCC14 and GND7
Package details
Follows the selected physical package
- Manufacturer
- Texas Instruments
- Part number
- SN74HC14N
- Package
- PDIP-14
- Connections
- 14 pins
- Mounting
- Through-hole
- Lead pitch
- 2.54 mm
- Package code
- dip
- Thermal reference
- Board and package dependent; see manufacturer data
Connections by function
Select a pin to open its function, electrical notes and wiring guidance.
Schmitt inputs6 pins
Inverted outputs6 pins
Supply & return2 pins
Schmitt inputs6 pins
Inverted outputs6 pins
Supply & return2 pins
Rise through the upper threshold
Starting with a LOW input, the output is HIGH. As the input rises past VT+, the output changes to LOW.
Fall through the lower threshold
The output stays LOW as the input falls through the middle band. It returns HIGH only after the input falls below VT−.
Use the separation
The gap between thresholds is hysteresis. It reduces repeated transitions from modest noise around a switching point, but it does not remove every possible contact bounce.
The explorer uses typical thresholds at 4.5 V. Real thresholds have the ranges shown in the tables; do not use this gate as a precision voltage comparator.
Explore the hysteresis window
Raise the input, then lower it. Watch the output remember its state.
Rising threshold: 2.5 V
Falling threshold: 1.6 V
Enable JavaScript to explore hysteresis.
Blue: rising input → · Purple: falling input ← · Shaded band: retain previous state.
Typical-threshold teaching model at 4.5 V. VT+ = 2.5 V and VT− = 1.6 V; actual thresholds vary within the datasheet ranges. Output levels are ideal rails, propagation delay is omitted, and reset starts with input LOW.
Pin reference
Select a pin to explore its function and connection.
| Pin | Signal | Type | Function |
|---|---|---|---|
| 1A | Schmitt-trigger input | Input of inverter 1, with separate rising and falling switching thresholds. | |
| 1Y | Inverted logic output | Output of inverter 1. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−. | |
| 2A | Schmitt-trigger input | Input of inverter 2, with separate rising and falling switching thresholds. | |
| 2Y | Inverted logic output | Output of inverter 2. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−. | |
| 3A | Schmitt-trigger input | Input of inverter 3, with separate rising and falling switching thresholds. | |
| 3Y | Inverted logic output | Output of inverter 3. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−. | |
| GND | Ground | Supply return for all six gates. | |
| 4Y | Inverted logic output | Output of inverter 4. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−. | |
| 4A | Schmitt-trigger input | Input of inverter 4, with separate rising and falling switching thresholds. | |
| 5Y | Inverted logic output | Output of inverter 5. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−. | |
| 5A | Schmitt-trigger input | Input of inverter 5, with separate rising and falling switching thresholds. | |
| 6Y | Inverted logic output | Output of inverter 6. Goes LOW when the input rises past VT+ and HIGH when it falls below VT−. | |
| 6A | Schmitt-trigger input | Input of inverter 6, with separate rising and falling switching thresholds. | |
| VCC | Positive supply | Supply for all six gates. |
No pins match. Try a signal name or choose All pins.
Operating conditions
SN74HC14
| Parameter | Value | Conditions / notes |
|---|---|---|
| Supply | 2–6 V | Nominal 5 V; this example uses 4.5 V |
| Input voltage | 0 to VCC | Normal operating range |
| Ambient temperature | −40 to +85°C | SN74HC14 grade |
| Unused inputs | Tie to a defined LOW or HIGH | Unused outputs may be left unconnected |
| Supply bypass | 100 nF | Place close to VCC14 and GND7 |
No specifications match. Try a parameter name or a unit.
HC and HCT input thresholds are different; this page is for HC.
Schmitt-trigger thresholds
4.5 V supply
| Parameter | Value | Conditions / notes |
|---|---|---|
| Rising threshold VT+ | 1.55–3.13 V | 2.5 V typical at 25°C |
| Falling threshold VT− | 0.90–2.45 V | 1.6 V typical at 25°C |
| Hysteresis VT+ − VT− | 0.40–2.10 V | 0.9 V typical at 25°C |
| Input between thresholds | Retain the previous output | History matters |
| Startup in the middle band | Not a defined initial state | First drive through a threshold |
No specifications match. Try a parameter name or a unit.
Threshold ranges are device limits. Do not subtract unrelated worst-case endpoints to infer a negative hysteresis.
Electrical and timing reference
4.5 V unless stated
| Parameter | Value | Conditions / notes |
|---|---|---|
| Output HIGH | ≥3.84 V | IOH = −4 mA; −40 to 85°C |
| Output LOW | ≤0.33 V | IOL = 4 mA; −40 to 85°C |
| Propagation delay | 12 ns typical; 31 ns maximum | A to Y; CL = 50 pF; maximum over temperature |
| Output transition time | 8 ns typical; 19 ns maximum | CL = 50 pF; maximum over temperature |
| Input leakage | ±1 µA maximum | 6 V; input at 0 or VCC |
| Static supply current | 20 µA maximum | 6 V; inputs at rails; unloaded |
| Input capacitance | 3 pF typical; 10 pF maximum | 5 V |
No specifications match. Try a parameter name or a unit.
Slow or midrail inputs can increase supply current; the static supply-current figure is for rail-level inputs.
Filtered switch example
4.5 V supply · first gate
| Parameter | Value | Conditions / notes |
|---|---|---|
| Pull-up resistor R1 | 100 kΩ | From VCC to input node |
| Input capacitor C1 | 100 nF | From input node to GND |
| Switch resistor R2 | 1 kΩ | Series path from input node through switch to GND |
| Release time constant | 10 ms nominal | R1 × C1 |
| Pressed input voltage | Approximately 44.6 mV | 4.5 × 1 / (100 + 1) |
| LED resistor R3 | 1 kΩ | From output2 to LED anode |
| Output meaning | Button pressed → HIGH | Inverting gate; LED ON |
No specifications match. Try a parameter name or a unit.
The RC network helps debounce, but the required values depend on the switch and application.
Package and stress limits
SN74HC14N · PDIP-14
| Parameter | Value | Conditions / notes |
|---|---|---|
| Lead pitch | 2.54 mm | Through-hole; top view |
| Gate pairs | 1→2, 3→4, 5→6 | First three gates |
| Gate pairs | 9→8, 11→10, 13→12 | Last three gates |
| Supply absolute maximum | −0.5 to +7 V | Stress rating only |
| Output current absolute maximum | ±25 mA | Per output; not recommended drive current |
| VCC / GND current | ±50 mA maximum | Absolute maximum total rail current |
| Storage temperature | −60 to +150°C | Unpowered storage |
No specifications match. Try a parameter name or a unit.
Keep normal operation inside recommended conditions and output-drive specifications.
Switch-input cleanup
Combine an RC network and a Schmitt input to reduce contact-bounce transitions. Validate against the actual switch.
Manufacturer application guideSlow-edge conditioning
Convert a slow sensor or RC transition into a fast logic edge while observing voltage limits.
Manufacturer application guideRC oscillators
Feedback through a resistor and capacitor can make an oscillator. Its frequency varies with the gate thresholds and component tolerances.
Manufacturer application guideTake it into ProTech
Find 74HC14 in the Components Library to place its schematic symbol and connect its pins.
Reference page · circuit simulation model not yet availableOpen ProTech
