LM1458 Reference Tables, Pins & Specifications

Pin reference

Signal names, electrical functions and connection guidance

PDIP-8

Physical pin numbers8 pins

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LM1458 pin functions and connections
Signal	Type	Function & connection
OUT1	Analog output	Channel A output. Connection guidance Return to IN1− through 20 kΩ; connect a high-impedance meter.
IN1−	Inverting input	Channel A negative-feedback node. Connection guidance Join 20 kΩ from OUT1 and 10 kΩ to signal ground.
IN1+	Non-inverting input	Channel A signal input. Connection guidance Apply VIN = 0.50 V relative to the 0 V midpoint.
V−	Negative supply	Negative rail shared by both amplifiers. Connection guidance Connect −15 V; bypass locally to 0 V with 100 nF.
IN2+	Non-inverting input	Channel B signal input. Connection guidance Connect to the same VIN in the illustrated follower.
IN2−	Inverting input	Channel B feedback input. Connection guidance Connect directly to OUT2 pin 7.
OUT2	Analog output	Channel B output. Connection guidance Connect to IN2−; leave unloaded or use a high-impedance instrument.
V+	Positive supply	Positive rail shared by both amplifiers. Connection guidance Connect +15 V; bypass locally to 0 V with 100 nF.

LM1458 commercial grade

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Specified ambient range	0 to +70°C	LM1458, not LM1558
Electrical-characterization supply	±15 V	The example follows this test condition
Absolute maximum supply	±18 V	Stress limit, not an operating recommendation
Absolute differential input	±30 V	Respect input and supply conditions
Absolute input voltage	±15 V	At lower supply voltages, do not exceed either supply rail
Maximum junction temperature	100°C	LM1458 rating
PDIP power dissipation limit	400 mW	Derate using the manufacturer guidance and actual mounting

This legacy document does not provide a separate recommended minimum supply. No unverified low-voltage range is inferred.

±15 V · 25°C unless stated

Manufacturer-referenced values5 parameters

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Parameter	Value	Conditions / notes
Input offset voltage	1 mV typical; 6 mV maximum	RS ≤10 kΩ; 7.5 mV maximum over temperature
Input offset current	80 nA typical; 200 nA maximum	300 nA maximum over temperature
Input bias current	200 nA typical; 500 nA maximum	0.8 µA maximum over temperature
Input resistance	0.3 MΩ minimum; 1 MΩ typical	25°C characterization
Total supply current	3 mA typical; 5.6 mA maximum	Both amplifiers; ±15 V; 25°C

Choose source and feedback resistances with input-current error in mind.

±15 V rails; respect load conditions

Manufacturer-referenced values6 parameters

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Parameter	Value	Conditions / notes
Large-signal open-loop gain at 25°C	20 V/mV minimum; 160 V/mV typical	VO=±10 V; RL≥2 kΩ
Open-loop gain over temperature	15 V/mV minimum	Same output and load condition
Input common-mode range	±12 V minimum	Within ±15 V rails
Output swing at RL≥10 kΩ	±12 V minimum; ±14 V typical	Light-load swing
Output swing at RL≥2 kΩ	±10 V minimum; ±13 V typical	Heavier loading reduces headroom
Example output range	1.50 V and 0.50 V nominal	Light DC loads; well inside the specified swing

Typical output headroom is not a guaranteed limit.

Use the source document’s actual guarantees

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Common-mode rejection	70 dB minimum; 90 dB typical	RS≤10 kΩ
Supply-voltage rejection	77 dB minimum; 96 dB typical	RS≤10 kΩ
Frequency compensation	Internal	No external compensation required
Supply bypass	100 nF from each rail to 0 V	Local bypass; add bulk decoupling as needed
PDIP junction-to-ambient estimate	187°C/W	Manufacturer package estimate; mounting dependent
Short-circuit protection	Included	Check dissipation; do not use a short as a normal load
Bandwidth, slew rate and noise	No numeric claim on this page	Not specified in the selected manufacturer electrical table

The 0 V signal midpoint is distinct from the negative supply pin.

±15 V rails · 0 V signal reference

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Input VIN	0.50 V	Pins 3 and 5; common signal ground
Channel A feedback	20 kΩ	OUT1 pin 1 to IN1− pin 2
Channel A ground resistor	10 kΩ	IN1− pin 2 to 0 V
Channel A ideal output	1.50 V	0.50 × (1 + 20 / 10)
Channel B feedback	Direct connection	OUT2 pin 7 to IN2− pin 6
Channel B ideal output	0.50 V	Unity-gain follower
Bypass capacitors	100 nF per rail	Each supply rail to the 0 V midpoint

The 0 V reference is not the negative supply pin. Keep both rail-bypass loops short.

LM1458N/NOPB · PDIP-8

Manufacturer-referenced values5 parameters

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Parameter	Value	Conditions / notes
Lead pitch	2.54 mm	Through-hole
Channel A	OUT1 1; IN1− 2; IN1+ 3	Independent feedback loop
Channel B	IN2+ 5; IN2− 6; OUT2 7	Independent feedback loop
Supply	V− 4; V+ 8	Shared by both channels
Package orientation	Top view; pin 1 at the marker	Counterclockwise numbering

This dual-amplifier pinout differs from single amplifiers such as TL081 or LM741.