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Frequency-to-voltage converter

LM2907-N Reference Tables

Search the LM2907-N pin reference and manufacturer-referenced specification tables.

Package view
Selected packagePDIP-8LM2907N-8/NOPB
Physical connections8 pinsPackage-specific numbering
Reference collection8 tables46 parameters & pin functions

Pin reference

Signal names, electrical functions and connection guidance

PDIP-8
Physical pin numbers8 pins

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LM2907-N pin functions and connections
PinSignalTypeFunction & connection
TACH+Ground-crossing signal inputThe input comparator detects alternating positive and negative excursions relative to ground.
Connection guidance

Apply a 1 kHz sine wave with 1 V peak amplitude and zero DC offset in the example.

The eight-pin part needs both polarities; an ordinary 0–5 V logic waveform is not a direct substitute.

CP1Pump timing capacitorAn internal current charges and discharges C1 on alternate input half cycles.
Connection guidance

Connect C1 = 1 nF to GND.

Keep C1 above 500 pF for accurate operation and internal compensation.

CP2 / IN+Filtered charge-pump outputMirrored current pulses feed R1 and C2. This node is also the amplifier noninverting input in the eight-pin device.
Connection guidance

Connect 100 kΩ and 1 µF in parallel to GND.

The pump output is a current-producing node, not a rail-to-rail logic signal.

EMITOutput transistor emitterBuffered output in the voltage-follower connection.
Connection guidance

Join to IN−7, a high-impedance voltmeter and a 10 kΩ load to GND.

COLOutput transistor collectorSeparate collector of the internal amplifier output transistor.
Connection guidance

Join to the +12 V supply for the emitter-follower example.

COL is not internally tied to V+.

V+Device supplyPowers the input comparator, charge pump and amplifier.
Connection guidance

Use a regulated +12 V rail with 100 nF and local bulk bypass to GND.

Conversion gain is proportional to this supply; LM2907 has no LM2917-style internal Zener regulator.

IN−Amplifier inverting inputNegative-feedback input for the output amplifier.
Connection guidance

Connect directly to EMIT4 for unity-gain buffering.

CP2 / IN+3 and IN−7 must remain within the amplifier common-mode region.

TACH− / GNDGround and input referenceInternally connects the negative tachometer input to device ground in the eight-pin variant.
Connection guidance

Connect externally to circuit GND, including the signal-generator return.

The internal connection does not eliminate the external ground connection.

PDIP-8 · Top view · Select a pin number to open its interactive pinout.

Operating context

Selected eight-pin devices

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
Example supply12 V regulatedDatasheet electrical-characteristic test supply
Operating temperature−40 to +85°CSelected orderable-device grade
Amplifier common-mode input0 to VCC − 1.5 VElectrical table at 12 V and 25°C
Supply current3.8 mA typical; 6 mA maximumManufacturer electrical test conditions
Supply / collector stress limit28 V absolute maximumNot a normal operating target
Storage temperature−65 to +150°CUnpowered

Supply variation changes the conversion gain; select a clean, stable rail.

Input and charge pump

12 V, 25°C reference conditions

Manufacturer-referenced values7 parameters

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ParameterValueConditions / notes
Input thresholds±25 mV typical; ±10 to ±40 mV specified250 mV peak-to-peak input at 1 kHz
Input hysteresis30 mV typicalManufacturer threshold test
Eight-pin input offset5 mV typical; 15 mV maximumManufacturer threshold test
Charge/discharge current180 µA typical; 140–240 µACP1 / CP2 at 6 V
Pump voltage excursionApproximately VCC / 2Difference between C1 charge and discharge levels
Conversion constant K1 typical; 0.9–1.1 specifiedVOUT = K × VCC × f × C1 × R1
C1 selectionGreater than 500 pF for accurate operationExample uses 1 nF

Do not drive the eight-pin input with a waveform that never crosses ground.

Output amplifier

Separate collector and emitter

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
Input offset3 mV typical; 10 mV maximumVIN = 6 V
Input bias50 nA typical; 500 nA maximumVIN = 6 V
Output source current10 mA minimumEmitter at VCC − 2 V
Output sink current40 mA minimum; 50 mA typicalCollector at 1 V
Follower configurationCOL to supply; EMIT to IN−Example uses a high-impedance meter and 10 kΩ load
Example load at 1 kHz1.2 V / 10 kΩ = 0.12 mANominal settled value

Source and sink capabilities are specified under different conditions; do not assume 50 mA is guaranteed in both directions.

12 V tachometer example

All ground symbols share one return

Manufacturer-referenced values8 parameters

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ParameterValueConditions / notes
TACH+11 kHz sine, ±1 V peakZero DC offset; generator return to GND8
CP1 pin 2C1 = 1 nF to GNDSets charge transferred per cycle
CP2 / IN+ pin 3R1 = 100 kΩ and C2 = 1 µF to GNDParallel averaging network
EMIT4 and IN−7Join as VOUTUnity-gain buffer feedback
COL5 and V+6+12 VOutput transistor and controller share the bench supply
GND8Circuit returnMandatory external connection
Supply bypass100 nF + 10 µF to GNDClose to V+6 and GND8
Output load10 kΩ to GND plus voltmeterKeep the instrument high impedance

No microcontroller or firmware is required. This is an illustrative reference circuit, not a live simulation.

Scale, ripple and response

Nominal example · K = 1

Manufacturer-referenced values8 parameters

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ParameterValueConditions / notes
Conversion equationVOUT ≈ K × VCC × fIN × C1 × R1Subject to pump current, amplifier range and tolerances
Scale1.2 mV / Hz12 V × 1 nF × 100 kΩ
500 Hz / 1 kHz / 5 kHz0.6 V / 1.2 V / 6 VSettled illustrative readings
Average current at 1 kHz12 µAVCC × fIN × C1
Filter time constant100 ms100 kΩ × 1 µF
Approximate 1% settlingAbout 0.46 s4.6 RC for an ideal first-order filter
Pump ripple at 1 kHzAbout 5.6 mV peak-to-peakDatasheet approximation with I2 = 180 µA
Stopped inputOutput decays toward zeroThe filter prevents an instantaneous step

These are calculated values. Capacitor/resistor tolerances, K, supply stability and amplifier errors affect the measured result.

Accuracy and design limits

Keep the operating point in range

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
Typical linearity0.3%TI test network: C1 = 1 nF, R1 = 68 kΩ, C2 = 0.22 µF
Specified nonlinearity−1% to +1%5 kHz deviation from line through 1 and 10 kHz test points
Gain errorK is specified 0.9–1.1Typical linearity is not total absolute accuracy
Larger C2Less ripple, slower responseIt does not change ideal DC gain
Larger R1 or C1More volts per hertzMay reduce usable frequency/output range
Supply sensitivityOutput scale follows VCCUse regulation or calibrate the complete system

The 100 kΩ example differs from the linearity test network; its total accuracy is not claimed to equal that test result.

Package selection

LM2907N-8/NOPB · PDIP-8

Manufacturer-referenced values5 parameters

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ParameterValueConditions / notes
Through-holeLM2907N-8/NOPB · PDIP-82.54 mm pitch; 7.62 mm nominal rows
Surface mountLM2907M-8/NOPB · SOIC-81.27 mm pitch; narrow body
Fourteen-pin variantsDifferent map and internal connectionsNot represented by these eight-pin views
LM2917 distinctionAdds an internal Zener regulatorDo not import its regulator limits into LM2907
Footprint provenanceOriginal editable TEP land patternsVerify the exact ordered package and fabricator rules

Pin functions and physical numbering stay consistent when switching between the two selected packages.

Read each value with its conditions

Typical values describe the stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Texas Instruments · SNAS555D · December 2016
Official PDF datasheet

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