LM317L Reference Tables, Pins & Specifications

Pin reference

Signal names, electrical functions and connection guidance

TO-92

Physical pin numbers3 pins

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LM317L pin functions and connections
Signal	Type	Function & connection
INPUT	Supply input	Feeds the series pass regulator. Connection guidance Connect to the example +9 V supply with local 0.1 µF bypass. TO-92 and SOIC physical pin 1. Verify chip-origin differential limits.
OUTPUT	Regulated output	Supplies the load and resistor divider. Connection guidance Connect all SOIC OUTPUT leads together on the PCB. TO-92 pin 2; SOIC pins 2, 3, 6 and 7 are internally common.
ADJUST	Adjustment terminal	Feedback reference, approximately 1.25 V below OUTPUT for legacy chips. Connection guidance Connect R1 from OUTPUT to ADJUST and R2 from ADJUST to ground. TO-92 pin 3; SOIC pin 4. ADJUST is not ground.
OUTPUT	Common output contact	SOIC pin 3 connects internally to the other OUTPUT pins. Connection guidance Join all OUTPUT contacts on the PCB. SOIC only; no corresponding TO-92 lead.
NC	No internal connection	SOIC pin 5 has no internal connection. Connection guidance May be grounded for improved thermal performance per TI; not required. SOIC only; no corresponding TO-92 lead.
OUTPUT	Common output contact	SOIC pin 6 connects internally to the other OUTPUT pins. Connection guidance Join all OUTPUT contacts on the PCB. SOIC only; no corresponding TO-92 lead.
OUTPUT	Common output contact	SOIC pin 7 connects internally to the other OUTPUT pins. Connection guidance Join all OUTPUT contacts on the PCB. SOIC only; no corresponding TO-92 lead.
NC	No internal connection	SOIC pin 8 has no internal connection. Connection guidance May be grounded for improved thermal performance per TI; not required. SOIC only; no corresponding TO-92 lead.

Package and chip identity

TI SLCS144G distinctions

Manufacturer-referenced values5 parameters

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Parameter	Value	Conditions / notes
TO-92	LM317LCLP · LP0003A	Legacy SHE or TID chip; no new RFB die
SOIC-8	LM317LCDR · D0008A	Legacy SHE/TID or new RFB; verify ordered device
TO-92 physical pins	1 INPUT; 2 OUTPUT; 3 ADJUST	Front view left-to-right: 3,2,1
SOIC physical pins	IN1; OUT2,3,6,7; ADJ4; NC5,8	All four OUTPUT terminals are internally connected
Chip origin	CSO: SHE / TID / RFB	Check manufacturer traceability; package alone is insufficient

Package-specific pin maps are explicit. Do not assume another manufacturer uses the same lead order.

Recommended ranges and absolute limits

SHE / TID / RFB are distinct chip variants

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Output voltage	SHE 1.25–32 V; TID/RFB 1.25–37 V	With adequate headroom and load
Recommended differential	SHE 2.5–32 V; TID/RFB 2.5–37 V	VI−VO
Absolute differential	SHE 35 V; TID 40 V; RFB 45 V	Stress limits, not operating targets
Recommended output current	2.5–100 mA	Minimum-load row may require 5 mA for legacy TID
LM317LC junction	SHE 0–125°C; TID/RFB −40–125°C	Verify chip origin
LM317LI junction	−40–125°C	Industrial grade
Absolute junction maximum	150°C	Recommended operating maximum remains 125°C

Never apply the RFB 45 V stress rating to unverified legacy stock.

Reference and adjustment current

VI−VO 5–35 V; IO 2.5–100 mA; rated dissipation

Manufacturer-referenced values6 parameters

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Parameter	Value	Conditions / notes
Legacy VREF min / typ / max	1.20 / 1.25 / 1.30 V	SHE and TID
RFB VREF min / typ / max	1.220 / 1.256 / 1.292 V	New chip
Legacy IADJ	50 µA typical; 100 µA max.	Flows out of ADJUST
RFB IADJ	44 µA typical; 57 µA max.	New chip
Legacy ΔIADJ	0.2 µA typical; 5 µA max.	2.5–35 V differential
RFB ΔIADJ	0.8 µA typical; 2.5 µA max.	2.8–35 V differential

Typical values are illustrative; reference and resistor tolerances affect the actual rail.

Regulation and ripple

Manufacturer test conditions retained

Manufacturer-referenced values8 parameters

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Parameter	Value	Conditions / notes
Legacy line regulation at 25°C	0.01 typical / 0.02 max. %/V	5–35 V differential
RFB line regulation at 25°C	0.007 typical / 0.021 max. %/V	5–35 V differential
Legacy line regulation over specified range	0.02 typical / 0.05 max. %/V	IO 2.5–100 mA
RFB line regulation over specified range	0.006 typical / 0.0275 max. %/V	IO 2.5–100 mA
Legacy load regulation, VO≤5 V	25 mV at 25°C; 50 mV over range	Maximum; IO 2.5–100 mA; 5–35 V differential
RFB load regulation, VO≤5 V	25 mV maximum	At 25°C and over range; same test conditions
Ripple with 10 µF CADJ	Legacy 66 min / 80 typ dB; RFB 64 min / 71.5 typ dB	VO10 V; 120 Hz
Noise	10 µV/V typical	10 Hz–10 kHz; 25°C

Avoid mixing new-chip headline numbers with the legacy package specification.

Minimum load and peak current

Guaranteed regulation requires the applicable load

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Minimum load at 35 V differential	SHE 1.5 typ / 2.5 max. mA	Legacy chip
Minimum load at 35 V differential	TID 3.5 typ / 5 max. mA	Legacy chip
Minimum load at 35 V differential	RFB 1.28 typ / 1.72 max. mA	Recommended operating floor is still 2.5 mA
Legacy SHE peak current	100 mA minimum; 200 mA typical	Differential ≤35 V
Legacy TID peak current	100 min / 200 typ mA at 3–13 V	At 35 V: 25 min / 50 typ / 150 max. mA
New RFB peak current	160 min / 290 typ mA	Differential ≤35 V; not a 290 mA continuous rating
Example divider minimum	1.20 / 222.2 ≈5.40 mA	220 Ω at +1%; covers 5 mA legacy requirement

Thermal limits apply in addition to current limiting.

Thermal and capacitor guidance

Board-dependent thermal figures

Manufacturer-referenced values6 parameters

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Parameter	Value	Conditions / notes
TO-92 θJA	139.5 SHE / 156.7 TID °C/W	Manufacturer reference conditions
SOIC θJA	97.1 SHE / 96.5 TID / 98.18 RFB °C/W	Actual PCB and airflow change the result
Local input bypass	0.1 µF	Especially with long supply wiring
Output capacitor	1 µF optional for transient response	No output capacitor required for stability per TI
Adjustment bypass	Optional 10 µF	Review protection diodes when adding stored charge
Example pass loss	≈62.7 mW	(9−5) × (5/500+1.25/220)

Protection is not a substitute for correct operating voltage, minimum load or thermal design.

Near-5 V calculated example

220 Ω / 660 Ω · 500 Ω load

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Input / bypass	9 V / 0.1 µF	Common ground return
Ideal legacy output	1.25 × (1+660/220) = 5.00 V	Before adjustment current
Legacy typical corrected output	5.033 V	Adds 50 µA × 660 Ω
New RFB typical corrected output	5.05304 V	1.256 ×4 +44 µA ×660
Load / divider current	10 mA / 5.682 mA	Nominal 5 V legacy calculation
Resistor power	50 mW in 500 Ω load	Use 0.25 W or higher appropriately rated resistors
Output capacitor	1 µF, suitably rated	Follow manufacturer bypass/protection guidance

Calculated illustration, not a measured or time-domain simulation.