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LM319High-speed dual voltage comparator

Two fast threshold decisions, with independently returned output stages.

Manufacturer-referenced

Texas Instruments · LM319N/NOPB

PDIP-14SNOSBJ2B · January 2016

LM319 contains two high-speed voltage comparators. Each compares an input pair and controls an open-collector output, allowing the pull-up supply and output-stage return to be chosen within the device limits. It makes threshold decisions rather than providing linear op-amp gain. This page selects TI LM319N/NOPB in PDIP-14 and LM319M/NOPB in SOIC-14, both commercial 0–70°C parts. Four physical pins are unconnected. The fourteen-pin drawing defines the mapping; it must not be confused with the family’s ten-pin metal-can arrangement. The example uses a 5 V supply, a 2 V divider reference and a 1.5 V input. A 10 kΩ pull-up lets the first output indicate LOW or HIGH. Both inputs stay in the 1–3 V common-mode range; the second comparator is also given defined inputs. The quoted 80 ns response is typical under ±15 V test conditions, not a speed guarantee for this 5 V example.

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LM319N/NOPB black package with silver leads and readable markings.
LM319N/NOPB · PDIP-14Package illustration

Pinout

LM319PDIP-14Top view
Select a pin to see its functionPDIP-14 · 14 pins

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14Physical pins LM319N/NOPBPDIP-14 Manufacturer-referencedTexas Instruments

Pin diagram

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Package map
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LM319PDIP-14Top view

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1
PIN 1 · Not connected

NC

No connection

Function

No internal connection for the selected fourteen-pin package.

How to connect

Leave open; do not connect to ground.

Key specifications

The output transistor pulls LOW or releases the line. A separate external resistor creates HIGH; the IC does not actively source that state.

Independent comparators2 Separate output-stage returns
Typical response80 ns · ±15 V test
Illustrated supply5 V · inputs kept at 1–3 V
Selected ambient range0–70 °C

Operating profile

Supply, signals and operating conditions

LM319 operating profile
ParameterValueConditions / notes
Selected packagePDIP-14LM319N/NOPB
Reference threshold2.00V · 30 kΩ / 20 kΩ divider
Output topologyOpen collector10 kΩ external pull-up in example
Use these values with the stated grade and test conditions.

Package details

LM319N/NOPB · PDIP-14

Selected package
Selected LM319 physical package
PropertyDetails
ManufacturerTexas Instruments
Part numberLM319N/NOPB
PackagePDIP-14
Connections14 pins
MountingThrough-hole
Lead pitch2.54 mm
Package codedip
Thermal referenceBoard and package dependent; see manufacturer data

Supply and input conditions

Selected TI LM319, not the A-grade column

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ParameterValueConditions / notes
Supply capabilitySingle 5 V through ±15 VElectrical-section applicability; observe all ground-relative limits
Illustrated railsV+ = 5 V; V− = 0 VPin 11 positive; pin 6 negative
Input range at 5 V1–3 VGround is outside the specified input range
Input range at ±15 V±13 V typicalManufacturer electrical table
Ambient operating range0–70°CLM319N/M commercial orders
Ground-to-supply operating noteDo not exceed 16 VManufacturer electrical-section instruction

Recommended operating conditions and absolute stress limits are distinct.

Input accuracy and current

±15 V; 25°C unless noted

Scroll sideways to see all columns.

ParameterValueConditions / notes
Input offset2 mV typical; 8 mV maximumRS ≤ 5 kΩ
Offset over temperature10 mV maximum0–70°C; RS ≤ 5 kΩ
Input bias current250 nA typical; 1000 nA maximum1200 nA maximum over temperature
Input offset current80 nA typical; 200 nA maximum300 nA maximum over temperature
Voltage gain8 V/mV minimum; 40 V/mV typicalOutput pulled to 15 V through 1.4 kΩ

Offset specifications use the manufacturer output/load definition; do not treat typical values as guarantees.

Response and open-collector output

Retain the test conditions

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ParameterValueConditions / notes
Response time80 ns typical±15 V; 100 mV step with 5 mV overdrive
Saturation at 25 mA0.75 V typical; 1.5 V maximumVIN differential ≤ −10 mV; 25°C
Saturation at ≤3.2 mA0.3 V typical; 0.4 V maximumV+ ≥ 4.5 V, V− = 0 V; differential ≤ −10 mV
Output leakage0.2 µA typical; 10 µA maximum35 V output, 25°C; V− and GND = 0 V; differential ≥ 10 mV
Pull-up rise timeDepends on resistance and capacitanceDo not equate the 80 ns figure with every circuit edge

A 10 kΩ pull-up is suitable for this low-current DC illustration, not a promise of maximum switching speed.

Power and stress limits

Check every voltage reference

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ParameterValueConditions / notes
Positive supply current at 5 V4.3 mA typical25°C; V− = 0 V
Positive supply current at ±15 V8 mA typical; 12.5 mA maximum25°C
Negative supply current at ±15 V3 mA typical; 5 mA maximum25°C
Absolute total supply36 VStress limit
Absolute differential input±5 VDo not apply supply-span differential signals
Absolute output to V−36 VCollector stress limit
Absolute GND to V− / V+25 V / 18 VSeparate output-stage return constraints
Absolute power dissipation500 mWThermal conditions and derating still apply

Absolute limits do not authorize continuous operation at those conditions.

A 2 V threshold detector

Calculated DC example, not a timing simulation

Scroll sideways to see all columns.

ParameterValueConditions / notes
Reference divider30 kΩ upper; 20 kΩ lower5 × 20/(30+20) = 2.00 V, before input-current error
VIN = 1.50 VOUT1 LOWInput 4 below reference input 5
VIN = 2.50 VOUT1 released / HIGHExternal pull-up creates high level
Pull-up10 kΩ to +5 VConnected to output pin 12
Illustrative LOW currentAbout 0.47 mA(5−0.3)/10 kΩ; 0.3 V is a typical estimate
Second comparatorIN+9 = VIN; IN−10 = VREFOutput 7 left unused
Local bypass100 nF between pins 11 and 6All GND symbols in this example share 0 V

Input bias loads the divider; use a lower source impedance or buffer when threshold accuracy matters.

Fourteen-pin package map

LM319N/NOPB · PDIP-14

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ParameterValueConditions / notes
Lead pitch2.54 mmThrough-hole
Channel 14 IN+; 5 IN−; 12 OUTOutput-stage return: pin 3
Channel 29 IN+; 10 IN−; 7 OUTOutput-stage return: pin 8
Analog supplies11 V+; 6 V−Shared by both channels
No connection1, 2, 13, 14Leave open
Pin-map sourceTI fourteen-pin drawing, page 3Cross-checked against ST fourteen-pin drawing
LayoutShort bypass and output-current loopsKeep output switching currents away from input/reference traces

Use the package drawing: the TI pin-function table has inconsistent ten/fourteen-pin column labels.

Connections by function

Select a pin for its function, connection guidance and electrical notes.

Not connected4 pins

Supply4 pins

Comparator inputs4 pins

Open collectors2 pins

Read the conditions with every value

Typical values describe stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Official PDF datasheet

LM319 at a glance

Follow the labeled connections and functional stages

LM319 working principle: illustrated functional stages, basic circuit and connections
Select the diagram to read it at full resolution.

How it works

3 stages · Explore one step at a time

Step 1 / 3

Set a valid threshold

30 kΩ above 20 kΩ creates an ideal 2 V reference from 5 V. Both input voltages must remain between 1 V and 3 V.

Step 2 / 3

Compare the input

Channel 1 compares VIN at pin 4 with VREF at pin 5. VIN below VREF turns its output transistor on.

Step 3 / 3

Read the collector

The 10 kΩ pull-up on pin 12 creates HIGH when the transistor turns off. Pins 3 and 8 return output current to 0 V.

LM319 in a circuit

A physical fourteen-pin IC, divider and pulled-up collector.

LM319N at 5 V, 30 kΩ/20 kΩ divider to pins 5 and 10, VIN 1.5 V at pins 4 and 9, 10 kΩ pull-up on output 12, 100 nF bypass, output returns 3 and 8 grounded with supply 6.
Matching net labels are connected. Both channels have defined inputs; only output 1 is used.

Connect it, step by step

Follow the component values and pin connections

Power

Connect 11 to +5 V; connect 6, 3 and 8 to 0 V; bypass the analog supply.

Compare

Connect VIN to 4 and 9, and VREF to 5 and 10.

Read

Read output 12 through its 10 kΩ pull-up. Keep output 7 and all NC pins open.

Inside LM319

Two comparators with separate output-transistor returns.

LM319 two differential input paths driving open collectors 12 and 7, output returns 3 and 8, analog rails 11 and 6.
Functional architecture inside the package; not a transistor-level netlist.

Explore the circuit

Select a stage to see its role and connections

Sense

Each differential input pair controls one independent comparison.

Switch

A gain path switches the collector transistor on or off.

Return current

Each output transistor has its own return pin; both are grounded in this example.

Selected packagePDIP-14LM319N/NOPB
Physical connections14 pinsPackage-specific numbering
Reference collection7 tables38 parameters & pin functions

Pin reference

Signal names, electrical functions and connection guidance

PDIP-14
Physical pin numbers14 pins

Scroll within the table to see all columns and rows.

LM319 pin functions and connections
PinSignalTypeFunction & connection
NCNo connectionNo internal connection for the selected fourteen-pin package.
Connection guidance

Leave open; do not connect to ground.

NCNo connectionNo internal connection for the selected fourteen-pin package.
Connection guidance

Leave open; do not connect to ground.

GND1Output-stage returnEmitter return for comparator 1 output transistor.
Connection guidance

Connect to the common 0 V return in this example.

Separate from the analog negative supply pin; observe every rail-to-ground rating.

IN1+Non-inverting inputPositive input for comparator 1.
Connection guidance

Apply VIN = 1.50 V.

At a 5 V supply both inputs must remain between 1 V and 3 V.

IN1−Inverting inputThreshold input for comparator 1.
Connection guidance

Connect the 2.00 V reference.

Input polarity controls the open-collector state.

V−Negative analog supplyNegative supply for both comparator input/gain paths.
Connection guidance

Connect to 0 V in the shown single-supply circuit.

In split-supply use this can differ from the output-stage returns.

OUT2Open-collector outputSinks current when IN+ is lower than IN−; releases when IN+ is higher.
Connection guidance

Leave unused output open in the illustrated circuit.

No internal high-level driver; external pull-up is required to observe HIGH.

GND2Output-stage returnEmitter return for comparator 2 output transistor.
Connection guidance

Connect to the common 0 V return in this example.

Separate from the analog negative supply pin; observe every rail-to-ground rating.

IN2+Non-inverting inputPositive input for comparator 2.
Connection guidance

Tie to the same 1.50 V VIN node.

At a 5 V supply both inputs must remain between 1 V and 3 V.

IN2−Inverting inputThreshold input for comparator 2.
Connection guidance

Connect the 2.00 V reference.

Input polarity controls the open-collector state.

V+Positive analog supplyPositive supply shared by both comparators.
Connection guidance

Connect regulated +5 V and bypass locally with 100 nF to pin 6.

OUT1Open-collector outputSinks current when IN+ is lower than IN−; releases when IN+ is higher.
Connection guidance

Add a 10 kΩ pull-up to +5 V and a high-impedance meter.

No internal high-level driver; external pull-up is required to observe HIGH.

NCNo connectionNo internal connection for the selected fourteen-pin package.
Connection guidance

Leave open; do not connect to ground.

NCNo connectionNo internal connection for the selected fourteen-pin package.
Connection guidance

Leave open; do not connect to ground.

PDIP-14 · Top view · Select a pin number to open its interactive pinout.

Supply and input conditions

Selected TI LM319, not the A-grade column

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Supply capabilitySingle 5 V through ±15 VElectrical-section applicability; observe all ground-relative limits
Illustrated railsV+ = 5 V; V− = 0 VPin 11 positive; pin 6 negative
Input range at 5 V1–3 VGround is outside the specified input range
Input range at ±15 V±13 V typicalManufacturer electrical table
Ambient operating range0–70°CLM319N/M commercial orders
Ground-to-supply operating noteDo not exceed 16 VManufacturer electrical-section instruction

Recommended operating conditions and absolute stress limits are distinct.

Input accuracy and current

±15 V; 25°C unless noted

Manufacturer-referenced values5 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Input offset2 mV typical; 8 mV maximumRS ≤ 5 kΩ
Offset over temperature10 mV maximum0–70°C; RS ≤ 5 kΩ
Input bias current250 nA typical; 1000 nA maximum1200 nA maximum over temperature
Input offset current80 nA typical; 200 nA maximum300 nA maximum over temperature
Voltage gain8 V/mV minimum; 40 V/mV typicalOutput pulled to 15 V through 1.4 kΩ

Offset specifications use the manufacturer output/load definition; do not treat typical values as guarantees.

Response and open-collector output

Retain the test conditions

Manufacturer-referenced values5 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Response time80 ns typical±15 V; 100 mV step with 5 mV overdrive
Saturation at 25 mA0.75 V typical; 1.5 V maximumVIN differential ≤ −10 mV; 25°C
Saturation at ≤3.2 mA0.3 V typical; 0.4 V maximumV+ ≥ 4.5 V, V− = 0 V; differential ≤ −10 mV
Output leakage0.2 µA typical; 10 µA maximum35 V output, 25°C; V− and GND = 0 V; differential ≥ 10 mV
Pull-up rise timeDepends on resistance and capacitanceDo not equate the 80 ns figure with every circuit edge

A 10 kΩ pull-up is suitable for this low-current DC illustration, not a promise of maximum switching speed.

Power and stress limits

Check every voltage reference

Manufacturer-referenced values8 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Positive supply current at 5 V4.3 mA typical25°C; V− = 0 V
Positive supply current at ±15 V8 mA typical; 12.5 mA maximum25°C
Negative supply current at ±15 V3 mA typical; 5 mA maximum25°C
Absolute total supply36 VStress limit
Absolute differential input±5 VDo not apply supply-span differential signals
Absolute output to V−36 VCollector stress limit
Absolute GND to V− / V+25 V / 18 VSeparate output-stage return constraints
Absolute power dissipation500 mWThermal conditions and derating still apply

Absolute limits do not authorize continuous operation at those conditions.

A 2 V threshold detector

Calculated DC example, not a timing simulation

Manufacturer-referenced values7 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Reference divider30 kΩ upper; 20 kΩ lower5 × 20/(30+20) = 2.00 V, before input-current error
VIN = 1.50 VOUT1 LOWInput 4 below reference input 5
VIN = 2.50 VOUT1 released / HIGHExternal pull-up creates high level
Pull-up10 kΩ to +5 VConnected to output pin 12
Illustrative LOW currentAbout 0.47 mA(5−0.3)/10 kΩ; 0.3 V is a typical estimate
Second comparatorIN+9 = VIN; IN−10 = VREFOutput 7 left unused
Local bypass100 nF between pins 11 and 6All GND symbols in this example share 0 V

Input bias loads the divider; use a lower source impedance or buffer when threshold accuracy matters.

Fourteen-pin package map

LM319N/NOPB · PDIP-14

Manufacturer-referenced values7 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Lead pitch2.54 mmThrough-hole
Channel 14 IN+; 5 IN−; 12 OUTOutput-stage return: pin 3
Channel 29 IN+; 10 IN−; 7 OUTOutput-stage return: pin 8
Analog supplies11 V+; 6 V−Shared by both channels
No connection1, 2, 13, 14Leave open
Pin-map sourceTI fourteen-pin drawing, page 3Cross-checked against ST fourteen-pin drawing
LayoutShort bypass and output-current loopsKeep output switching currents away from input/reference traces

Use the package drawing: the TI pin-function table has inconsistent ten/fourteen-pin column labels.

Read each value with its conditions

Typical values describe the stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Texas Instruments · SNOSBJ2B · January 2016
Official PDF datasheet

Take it into ProTech

Find LM319 in the Components Library to place its schematic symbol and connect its pins.

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