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LM567Phase-locked-loop tone decoder

Recognize a tone and turn it into a clear logic signal.

Manufacturer-referenced

Texas Instruments · LM567CN/NOPB

PDIP-8SNOSBQ4F · January 2022

LM567C uses a phase-locked loop to recognize a tone near an externally selected frequency. When a sufficiently strong signal lies inside its detection band, an internal output transistor turns on and pulls OUT low. A pull-up resistor supplies the released HIGH state. A resistor between pins 5 and 6 and a capacitor from pin 6 to ground set the nominal center frequency. Separate capacitors at pins 2 and 1 set loop filtering and output response; they do not replace the timing capacitor. This page covers the LM567CN/NOPB and LM567CM/NOPB commercial parts, rated from 0 to 70°C. The illustrated 5 V circuit uses 10 kΩ and 100 nF for approximately 909 Hz. Component tolerances, signal amplitude, filters and settling determine actual detection.

Real View

LM567CN/NOPB black package with silver leads and readable markings.
LM567CN/NOPB · PDIP-8Package illustration

Pinout

LM567PDIP-8Top view
Select a pin to see its functionPDIP-8 · 8 pins

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8Physical pins LM567CN/NOPBPDIP-8 Manufacturer-referencedTexas Instruments

Pin diagram

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LM567PDIP-8Top view

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1
PIN 1 · Filter capacitors

OF_CAP

Output filter

Function

Sets output filtering and detection delay.

How to connect

Connect 2.2 µF to ground; positive end at pin 1.

Electrical note

Use C3 at least twice the loop-filter capacitor in the illustrated design.

Key specifications

The oscillator and phase detectors track an input near the selected center. External filters determine how quickly and selectively the output responds.

Operating supply3.5–8.5 V · 5 V example
Example center909 Hz · nominal
Selected ambient0–70 °C · CN / CM
Detection outputLOW Open collector · add pull-up

Operating profile

Supply, signals and operating conditions

LM567 operating profile
ParameterValueConditions / notes
Selected packagePDIP-8LM567CN/NOPB
Timing network10 kΩ / 100 nFR1 between 5–6; C1 from 6 to ground
Loop / output filters1 / 2.2 µFPins 2 / 1 to ground
Use these values with the stated grade and test conditions.

Package details

LM567CN/NOPB · PDIP-8

Selected package
Selected LM567 physical package
PropertyDetails
ManufacturerTexas Instruments
Part numberLM567CN/NOPB
PackagePDIP-8
Connections8 pins
MountingThrough-hole
Lead pitch2.54 mm
Package codedip
Thermal referenceθJA 53.0°C/W · manufacturer thermal table

Supply and signal reference

LM567C · 5 V / 25°C electrical tests

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ParameterValueConditions / notes
Operating supply3.5–8.5 VRecommended operating table; use 5 V for the example
Selected ambient0 to +70°CCN / CM ordering options
Quiescent supply current7 mA typical; 10 mA maximumRL = 20 kΩ
Activated supply current12 mA typical; 15 mA maximumRL = 20 kΩ
Input resistance15 kΩ minimum; 20 kΩ typicalTone input pin 3
Smallest detected input20 mV RMS typical; 25 mV RMS maximumInput at center frequency; manufacturer IL = 100 mA condition

Detection depends on frequency, amplitude, filtering and the manufacturer test conditions.

Timing and selectivity

External components define the application

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ParameterValueConditions / notes
Approximate center frequency1 / (1.1 × R1 × C1)R in ohms; C in farads; result in hertz
Timing resistorPins 5 to 610 kΩ in the example
Timing capacitorPin 6 to ground100 nF in the example
Highest center frequency100 kHz minimum; 500 kHz typical500 kHz is not a guaranteed limit for every unit
Largest detection bandwidth14% typical; 10–18% limitsMaximum-setting test; not the width of every filter network
Fastest on/off cyclingf₀ / 20 typicalReference condition, not instantaneous detection

R/C tolerance shifts the center; filter values and signal amplitude determine the usable detection band.

Open-collector output

Pin 8 sinks current on detection

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ParameterValueConditions / notes
Output LOW at 30 mA0.2 V typical; 0.4 V maximum25 mV test input
Output LOW at 100 mA0.6 V typical; 1.0 V maximum25 mV test input
Output leakage0.01 µA typical; 25 µA maximumOutput at 15 V
Output rise / fall time150 ns / 30 ns typicalElectrical test circuit
Example pull-up10 kΩ to +5 VLess than 0.5 mA when LOW
Released outputHIGH through the pull-upThe IC does not actively source that HIGH voltage

Large sink currents increase power dissipation; the lightly loaded example avoids that condition.

909 Hz detector example

Grounded signal generator and regulated 5 V

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ParameterValueConditions / notes
Input tone100 mV RMS near 909 HzAC-coupled through 100 nF to pin 3
R1 / C110 kΩ / 100 nFR1: 5–6; C1: 6–ground
C2 loop filter1 µFPin 2 to ground; positive at the pin
C3 output filter2.2 µFPin 1 to ground; at least 2 × C2
Supply bypass100 nF + 1 µFAcross pins 4 and 7, near the package
Output readingLOW after detection settlesHigh-impedance meter on pin 8
Nominal arithmetic909.1 Hz1 / (1.1 × 10000 × 100 × 10⁻⁹)

This is an illustrative tuned detector, not a specified instrument. Sweep and calibrate the assembled circuit.

Package and stress limits

LM567CN/NOPB · PDIP-8

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ParameterValueConditions / notes
Pitch / mounting2.54 mmThrough-hole
Package numbering8 physical pinsTop view; counterclockwise from the marker
Supply stress limit9 V absolute maximumDo not confuse with 8.5 V recommended maximum
Output stress limit15 V at pin 8External collector voltage; observe dissipation
Storage−65 to +150°CUnpowered
LayoutShort timing and filter returnsSeparate output-load currents from the sensitive input path

Absolute ratings are stress boundaries. The downloadable land pattern must be checked against the chosen assembly process.

Connections by function

Select a pin for its function, connection guidance and electrical notes.

Filter capacitors2 pins

Tone input1 pin

Supply1 pin

Oscillator timing2 pins

Ground1 pin

Detection output1 pin

Read the conditions with every value

Typical values describe stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Official PDF datasheet

LM567 at a glance

Follow the labeled connections and functional stages

LM567 working principle: illustrated functional stages, basic circuit and connections
Select the diagram to read it at full resolution.

How it works

3 stages · Explore one step at a time

Step 1 / 3

Choose the center frequency

Use f₀ ≈ 1 / (1.1 × R1 × C1). With 10 kΩ and 100 nF, the nominal center is 909.1 Hz.

Step 2 / 3

Filter the detector signals

The 1 µF loop capacitor and 2.2 µF output capacitor reduce unwanted responses. Larger filter capacitance generally trades faster response for stronger filtering.

Step 3 / 3

Read active-LOW detection

A settled, sufficient tone near the center turns the output transistor on. The 10 kΩ pull-up limits sink current to less than 0.5 mA at 5 V. Out of band, it releases the output.

LM567 in a circuit

A physical eight-pin decoder with a complete timing and filter network.

LM567CN pin4+5V,7ground,10k between5and6,100nF from6ground,1uF from2ground,2.2uF from1ground,ACtone into3 and10k pullup on8.
All ground symbols share one return; matching net labels are connected. Filter capacitors are positive toward the IC.

Connect it, step by step

Follow the component values and pin connections

Wire the timing pair

R1 joins pins 5 and 6; C1 joins pin 6 to ground.

Add the filters and power

Fit C2 at pin 2, C3 at pin 1 and both bypass capacitors across the 5 V supply.

Apply and sweep the tone

Use a grounded signal generator, start near 909 Hz and observe the active-LOW output after settling.

Inside LM567

Oscillator, phase detection and a filtered output in one compact IC.

LM567C functional cutaway showing a VCO with timing pins 5 and 6, I/Q phase detection from input 3, loop filter 2, output filter 1 and open-collector output 8.
Original functional explanation of the PLL; transistor-level implementation is simplified.

Explore the circuit

Select a stage to see its role and connections

Generate a local reference

R1 and C1 set the VCO timing near the desired tone.

Compare phase and amplitude

I/Q detector paths identify the signal and close the filtered control loop.

Drive the collector

The output filter controls the detection response before the transistor sinks pin 8.

Selected packagePDIP-8LM567CN/NOPB
Physical connections8 pinsPackage-specific numbering
Reference collection6 tables31 parameters & pin functions

Pin reference

Signal names, electrical functions and connection guidance

PDIP-8
Physical pin numbers8 pins

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LM567 pin functions and connections
PinSignalTypeFunction & connection
OF_CAPOutput filterSets output filtering and detection delay.
Connection guidance

Connect 2.2 µF to ground; positive end at pin 1.

Use C3 at least twice the loop-filter capacitor in the illustrated design.

LF_CAPLoop filterFilters the phase-locked-loop control signal.
Connection guidance

Connect 1 µF to ground; positive end at pin 2.

This capacitor affects capture bandwidth and response time.

INAnalog tone inputAccepts the tone to be detected.
Connection guidance

Feed the grounded signal generator through a 100 nF series capacitor.

Use 100 mV RMS near 909 Hz for this example, not a rail-level digital signal.

VCCPositive supplyPowers the decoder circuitry.
Connection guidance

Connect regulated +5 V, with 100 nF and 1 µF local bypass to ground.

T_RESTiming resistorOne side of the oscillator timing resistor.
Connection guidance

Connect R1 = 10 kΩ between pins 5 and 6.

The resistor goes between these pins, not from pin 5 to VCC.

T_CAPTiming capacitorOscillator timing node.
Connection guidance

Connect C1 = 100 nF to ground, and the other end of R1 from pin 5.

Use stable timing parts and short traces.

GNDGround returnCommon supply and signal return.
Connection guidance

Join supply negative, filter returns and signal-generator ground.

OUTOpen-collector outputSinks current when a sufficient signal is detected in the passband.
Connection guidance

Add a 10 kΩ pull-up to +5 V and read with a high-impedance meter.

LOW means detected. Without the pull-up, the released output is not driven HIGH.

PDIP-8 · Top view · Select a pin number to open its interactive pinout.

Supply and signal reference

LM567C · 5 V / 25°C electrical tests

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Operating supply3.5–8.5 VRecommended operating table; use 5 V for the example
Selected ambient0 to +70°CCN / CM ordering options
Quiescent supply current7 mA typical; 10 mA maximumRL = 20 kΩ
Activated supply current12 mA typical; 15 mA maximumRL = 20 kΩ
Input resistance15 kΩ minimum; 20 kΩ typicalTone input pin 3
Smallest detected input20 mV RMS typical; 25 mV RMS maximumInput at center frequency; manufacturer IL = 100 mA condition

Detection depends on frequency, amplitude, filtering and the manufacturer test conditions.

Timing and selectivity

External components define the application

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Approximate center frequency1 / (1.1 × R1 × C1)R in ohms; C in farads; result in hertz
Timing resistorPins 5 to 610 kΩ in the example
Timing capacitorPin 6 to ground100 nF in the example
Highest center frequency100 kHz minimum; 500 kHz typical500 kHz is not a guaranteed limit for every unit
Largest detection bandwidth14% typical; 10–18% limitsMaximum-setting test; not the width of every filter network
Fastest on/off cyclingf₀ / 20 typicalReference condition, not instantaneous detection

R/C tolerance shifts the center; filter values and signal amplitude determine the usable detection band.

Open-collector output

Pin 8 sinks current on detection

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Output LOW at 30 mA0.2 V typical; 0.4 V maximum25 mV test input
Output LOW at 100 mA0.6 V typical; 1.0 V maximum25 mV test input
Output leakage0.01 µA typical; 25 µA maximumOutput at 15 V
Output rise / fall time150 ns / 30 ns typicalElectrical test circuit
Example pull-up10 kΩ to +5 VLess than 0.5 mA when LOW
Released outputHIGH through the pull-upThe IC does not actively source that HIGH voltage

Large sink currents increase power dissipation; the lightly loaded example avoids that condition.

909 Hz detector example

Grounded signal generator and regulated 5 V

Manufacturer-referenced values7 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Input tone100 mV RMS near 909 HzAC-coupled through 100 nF to pin 3
R1 / C110 kΩ / 100 nFR1: 5–6; C1: 6–ground
C2 loop filter1 µFPin 2 to ground; positive at the pin
C3 output filter2.2 µFPin 1 to ground; at least 2 × C2
Supply bypass100 nF + 1 µFAcross pins 4 and 7, near the package
Output readingLOW after detection settlesHigh-impedance meter on pin 8
Nominal arithmetic909.1 Hz1 / (1.1 × 10000 × 100 × 10⁻⁹)

This is an illustrative tuned detector, not a specified instrument. Sweep and calibrate the assembled circuit.

Package and stress limits

LM567CN/NOPB · PDIP-8

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Pitch / mounting2.54 mmThrough-hole
Package numbering8 physical pinsTop view; counterclockwise from the marker
Supply stress limit9 V absolute maximumDo not confuse with 8.5 V recommended maximum
Output stress limit15 V at pin 8External collector voltage; observe dissipation
Storage−65 to +150°CUnpowered
LayoutShort timing and filter returnsSeparate output-load currents from the sensitive input path

Absolute ratings are stress boundaries. The downloadable land pattern must be checked against the chosen assembly process.

Read each value with its conditions

Typical values describe the stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Texas Instruments · SNOSBQ4F · January 2022
Official PDF datasheet

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