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LP2950-3.3100 mA low-dropout fixed regulator

A quiet 3.3 V rail with very little standby current.

Manufacturer-referenced

Texas Instruments · LP2950CZ-3.3/NOPB

TO-92SNVS764Q · December 2017

LP2950-3.3 is a three-terminal low-dropout regulator for a fixed 3.3 V rail, supplying up to 100 mA when input headroom and temperature permit. The low ground current at light load makes it useful for modest battery-powered analog and digital circuits. This page covers TI C-grade LP2950CZ-3.3/NOPB in TO-92 and LP2950CDT-3.3/NOPB in TO-252. Their OUT and IN pin numbers are reversed: TO-92 uses OUT1/GND2/IN3, while TO-252 uses IN1/GND2/OUT3 with a grounded tab. All package views follow that selection. A suitable output capacitor is essential for stability. The illustrated 5 V to 3.3 V supply uses local 1 µF input bypass, a 10 µF output capacitor with verified ESR, and a 330 Ω test load. The related LP2951 adds control functions; the three-pin LP2950 has no shutdown or error output.

Real View

LP2950 3.3 V black TO-92 regulator with three bright formed silver leads.
LP2950CZ-3.3/NOPB · TO-92Package illustration

Pinout

LP2950-3.3TO-92Front view · flat face toward you · 1 OUT, 2 GND, 3 IN
Select a pin to see its functionTO-92 · 3 pins

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3Physical pins LP2950CZ-3.3/NOPBTO-92 Manufacturer-referencedTexas Instruments

Pin diagram

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Package map
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LP2950-3.3TO-92Front view · flat face toward you · 1 OUT, 2 GND, 3 IN

Click a lead or use the arrow keys. Front view · flat face toward you · 1 OUT, 2 GND, 3 IN

1
PIN 1 · Regulated output

OUT

Regulated rail

Function

Fixed 3.3 V output; an external stability capacitor is required.

How to connect

Connect to the load and 10 µF output capacitor; return both to GND.

Electrical note

TO-92 pin 1; TO-252 pin 3. Use the selected package map.

Key specifications

An internal reference and feedback divider control a series-pass stage. Output capacitance, headroom and ground current remain part of the design.

Fixed output3.3 V · C grade, ±1% at 25°C
Output class100 mA · thermally limited
Light-load ground current75 µA typical at 100 µA load
Junction range−40–125 °C recommended

Operating profile

Supply, signals and operating conditions

LP2950-3.3 operating profile
ParameterValueConditions / notes
Selected packageTO-92LP2950CZ-3.3/NOPB
Full-load dropout380 mVtypical at 100 mA, 25°C
Example output capacitor10 µFVerify ESR across operating temperature
Use these values with the stated grade and test conditions.

Package details

LP2950CZ-3.3/NOPB · TO-92

Selected package
Selected LP2950-3.3 physical package
PropertyDetails
ManufacturerTexas Instruments
Part numberLP2950CZ-3.3/NOPB
PackageTO-92
Connections3 pins
MountingThrough-hole
Lead pitch1.27 mm · straight leads
Package codeLP
Thermal referenceθJA 157.4°C/W under TI board conditions; actual mounting changes temperature rise

Device and package identity

C-grade fixed 3.3 V parts

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ParameterValueConditions / notes
Through-hole orderLP2950CZ-3.3/NOPBTO-92 LP; straight-lead bulk footprint
SMD orderLP2950CDT-3.3/NOPBTO-252 NDP; formed outer leads and grounded tab
TO-92 physical pinsOUT1 · GND2 · IN3Flat face toward viewer, leads down
TO-252 physical pinsIN1 · GND2 · OUT3Front face, leads down; tab is GND
Accuracy gradeC: ±1% initialAC-grade values are not substituted
Extra controlsNo shutdown or error-output leadThese belong to the related LP2951

Verify order suffix and lead form before fabrication.

Operating ranges and stress limits

Temperature and headroom remain essential

Scroll sideways to see all columns.

ParameterValueConditions / notes
Nominal output3.3 VFixed internally; no external divider
Recommended input range2.3–30 V family range3.3 V regulation additionally needs dropout headroom
Maximum input stress30 VDo not design at the stress limit
Output-current class100 mAAdequate voltage headroom and cooling required
Junction operating temperature−40–125°CDevice junction, not ambient
Minimum external loadNot required for LP2950 regulationCapacitor stability requirements still apply

A 2.3 V input cannot produce a regulated 3.3 V output.

C-grade output accuracy

3.3 V option; source conditions retained

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ParameterValueConditions / notes
Output at 25°C3.267–3.333 VNominal 3.3 V
Output at −25 to 85°C3.251–3.350 VManufacturer specified range
Output over full temperature3.234–3.366 V−40 to 125°C
Across 100 µA–100 mA load3.221–3.379 VFull-temperature limit
Temperature coefficient50 ppm/°C typical; 150 max.Output-voltage drift
Line regulation at 25°C0.04% typical; 0.2% max.Input from VOUT(nom)+1 V to 30 V
Load regulation at 25°C0.1% typical; 0.2% max.Load from 100 µA to 100 mA

AC-grade limits are tighter; this page deliberately uses the selected C-grade specification.

Dropout and ground current

Load and temperature change both

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ParameterValueConditions / notes
Dropout at 100 µA load, 25°C50 mV typical; 80 mV max.150 mV maximum over full temperature
Dropout at 100 mA load, 25°C380 mV typical; 450 mV max.600 mV maximum over full temperature
Ground current at 100 µA load75 µA typical; 120 µA max. at 25°C140 µA maximum over full temperature
Ground current at 100 mA load8 mA typical; 12 mA max. at 25°C14 mA maximum over full temperature
Short-circuit current160 mA typical; 200 mA max. at 25°C220 mA maximum over full temperature; not a load rating
Full-load example headroomAt least 0.6 V for the full-temperature dropout limitAllow additional tolerance and ripple margin

Dropout is measured when output falls 100 mV below its nominal operating value.

Capacitors and stability

Capacitance alone is not enough

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ParameterValueConditions / notes
3.3 V minimum output capacitor2.2 µFObserve the stability-versus-ESR curves
Illustrated output capacitor10 µF tantalum, ≥10 VChoose ESR in the recommended stable region across temperature
ESR guidance for 2.2 µFApproximately 0.05–5 ΩTI application guidance; larger capacitors have their own curves
Ceramic output capacitorMay need 0.1–2 Ω series resistanceUse X5R/X7R and check effective capacitance after DC bias
Local input bypass1 µFParticularly for batteries or long supply wiring
Example COUT polarityPositive to OUT; negative to GNDCheck voltage rating and startup behavior

10 µF helps mitigate some startup/short-recovery overshoot. It is not a guarantee for arbitrary source impedance or capacitor ESR.

Thermal design and losses

Manufacturer thermal-board conditions

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ParameterValueConditions / notes
TO-92 θJA157.4°C/WTI reference board; actual assembly varies
TO-252 θJA51.3°C/WHigh-K board with 12 thermal vias
TO-252 θJC(bottom)2.2°C/WGrounded exposed tab
Total regulator dissipation(VIN−VOUT)×ILOAD + VIN×IGNDGround current cannot always be ignored
Example 10 mA pass loss(5−3.3)×0.010 = 17 mWAdd 5×IGND at the actual load
Illustrative full-load total170 mW + 40 mW = 210 mW5 V input, 100 mA load, typical 8 mA ground current

Thermal resistance is not an intrinsic promise of available output current.

5 V to 3.3 V working example

A modest test load with clear returns

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ParameterValueConditions / notes
Supply / input bypass5 V / 1 µFCommon GND return
Nominal output3.3 VActual output follows the C-grade limits
Test load330 Ω, ≥0.25 W3.3/330 = 10 mA
Load dissipation3.3²/330 = 33 mWNominal calculation
Output capacitor10 µF, ≥10 V, ESR verifiedLocal placement between OUT and GND
Pass-stage loss17 mWDoes not include load-dependent ground current

Calculated illustration; not measured waveforms or an executable simulation.

Connections by function

Select a pin for its function, connection guidance and electrical notes.

Regulated output1 pin

Ground1 pin

Supply1 pin

Read the conditions with every value

Typical values describe stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Official PDF datasheet

LP2950-3.3 at a glance

Follow the labeled connections and functional stages

LP2950-3.3 working principle: illustrated functional stages, basic circuit and connections
Select the diagram to read it at full resolution.

How it works

3 stages · Explore one step at a time

Step 1 / 3

Choose the physical package

TO-92 and TO-252 exchange the IN and OUT pin numbers. The SMD tab belongs to GND.

Step 2 / 3

Stabilize the rail

Place the specified output capacitor close to OUT and GND. Verify effective capacitance and ESR over temperature.

Step 3 / 3

Account for all heat

Use PD=(VIN−VOUT)×ILOAD+VIN×IGND. Ground current rises substantially near full load.

LP2950-3.3 in a circuit

Physical TO-92 leads, golden capacitor symbols and shared ground.

LP2950 TO92 physical OUT1 GND2 IN3 with5Vinput,1uFbypass,10uFoutputcapacitor and330ohmload.
TO-92 pin numbering shown. SMD reverses IN and OUT numbers; tab is GND.

Connect it, step by step

Follow the component values and pin connections

Supply

Apply 5 V to IN3 and common return to GND2.

Stabilize

Fit input bypass and the output capacitor with appropriate ESR.

Load

A 330 Ω load draws nominally 10 mA at 3.3 V.

Inside LP2950-3.3

Reference, feedback and protection inside a compact package.

LP2950 functional cutaway with input, series-pass stage, fixed feedback divider, error amplifier, reference and thermal/current limits.
Functional architecture, not an exact transistor schematic or die floorplan.

Explore the circuit

Select a stage to see its role and connections

Compare

Compare a fraction of OUT with an internal reference.

Regulate

Control the series-pass stage to hold the 3.3 V rail.

Protect

Current and thermal controls constrain overloads.

Selected packageTO-92LP2950CZ-3.3/NOPB
Physical connections3 pinsPackage-specific numbering
Reference collection8 tables43 parameters & pin functions

Pin reference

Signal names, electrical functions and connection guidance

TO-92
Physical pin numbers3 pins

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LP2950-3.3 pin functions and connections
PinSignalTypeFunction & connection
OUTRegulated railFixed 3.3 V output; an external stability capacitor is required.
Connection guidance

Connect to the load and 10 µF output capacitor; return both to GND.

TO-92 pin 1; TO-252 pin 3. Use the selected package map.

GNDCommon returnReference and bias-current return for the regulator.
Connection guidance

Join input return, output capacitor and load grounds locally.

Pin 2 in both packages; TO-252 exposed tab is also GND.

INSupply inputSupply input for the protected series-pass stage.
Connection guidance

Use +5 V in the example and local 1 µF bypass.

TO-92 pin 3; TO-252 pin 1. Maximum operating input 30 V; allow design margin.

TO-92 · Front view · flat face toward you · 1 OUT, 2 GND, 3 IN · Select a pin number to open its interactive pinout.

Device and package identity

C-grade fixed 3.3 V parts

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Through-hole orderLP2950CZ-3.3/NOPBTO-92 LP; straight-lead bulk footprint
SMD orderLP2950CDT-3.3/NOPBTO-252 NDP; formed outer leads and grounded tab
TO-92 physical pinsOUT1 · GND2 · IN3Flat face toward viewer, leads down
TO-252 physical pinsIN1 · GND2 · OUT3Front face, leads down; tab is GND
Accuracy gradeC: ±1% initialAC-grade values are not substituted
Extra controlsNo shutdown or error-output leadThese belong to the related LP2951

Verify order suffix and lead form before fabrication.

Operating ranges and stress limits

Temperature and headroom remain essential

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Nominal output3.3 VFixed internally; no external divider
Recommended input range2.3–30 V family range3.3 V regulation additionally needs dropout headroom
Maximum input stress30 VDo not design at the stress limit
Output-current class100 mAAdequate voltage headroom and cooling required
Junction operating temperature−40–125°CDevice junction, not ambient
Minimum external loadNot required for LP2950 regulationCapacitor stability requirements still apply

A 2.3 V input cannot produce a regulated 3.3 V output.

C-grade output accuracy

3.3 V option; source conditions retained

Manufacturer-referenced values7 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Output at 25°C3.267–3.333 VNominal 3.3 V
Output at −25 to 85°C3.251–3.350 VManufacturer specified range
Output over full temperature3.234–3.366 V−40 to 125°C
Across 100 µA–100 mA load3.221–3.379 VFull-temperature limit
Temperature coefficient50 ppm/°C typical; 150 max.Output-voltage drift
Line regulation at 25°C0.04% typical; 0.2% max.Input from VOUT(nom)+1 V to 30 V
Load regulation at 25°C0.1% typical; 0.2% max.Load from 100 µA to 100 mA

AC-grade limits are tighter; this page deliberately uses the selected C-grade specification.

Dropout and ground current

Load and temperature change both

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Dropout at 100 µA load, 25°C50 mV typical; 80 mV max.150 mV maximum over full temperature
Dropout at 100 mA load, 25°C380 mV typical; 450 mV max.600 mV maximum over full temperature
Ground current at 100 µA load75 µA typical; 120 µA max. at 25°C140 µA maximum over full temperature
Ground current at 100 mA load8 mA typical; 12 mA max. at 25°C14 mA maximum over full temperature
Short-circuit current160 mA typical; 200 mA max. at 25°C220 mA maximum over full temperature; not a load rating
Full-load example headroomAt least 0.6 V for the full-temperature dropout limitAllow additional tolerance and ripple margin

Dropout is measured when output falls 100 mV below its nominal operating value.

Capacitors and stability

Capacitance alone is not enough

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
3.3 V minimum output capacitor2.2 µFObserve the stability-versus-ESR curves
Illustrated output capacitor10 µF tantalum, ≥10 VChoose ESR in the recommended stable region across temperature
ESR guidance for 2.2 µFApproximately 0.05–5 ΩTI application guidance; larger capacitors have their own curves
Ceramic output capacitorMay need 0.1–2 Ω series resistanceUse X5R/X7R and check effective capacitance after DC bias
Local input bypass1 µFParticularly for batteries or long supply wiring
Example COUT polarityPositive to OUT; negative to GNDCheck voltage rating and startup behavior

10 µF helps mitigate some startup/short-recovery overshoot. It is not a guarantee for arbitrary source impedance or capacitor ESR.

Thermal design and losses

Manufacturer thermal-board conditions

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
TO-92 θJA157.4°C/WTI reference board; actual assembly varies
TO-252 θJA51.3°C/WHigh-K board with 12 thermal vias
TO-252 θJC(bottom)2.2°C/WGrounded exposed tab
Total regulator dissipation(VIN−VOUT)×ILOAD + VIN×IGNDGround current cannot always be ignored
Example 10 mA pass loss(5−3.3)×0.010 = 17 mWAdd 5×IGND at the actual load
Illustrative full-load total170 mW + 40 mW = 210 mW5 V input, 100 mA load, typical 8 mA ground current

Thermal resistance is not an intrinsic promise of available output current.

5 V to 3.3 V working example

A modest test load with clear returns

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Supply / input bypass5 V / 1 µFCommon GND return
Nominal output3.3 VActual output follows the C-grade limits
Test load330 Ω, ≥0.25 W3.3/330 = 10 mA
Load dissipation3.3²/330 = 33 mWNominal calculation
Output capacitor10 µF, ≥10 V, ESR verifiedLocal placement between OUT and GND
Pass-stage loss17 mWDoes not include load-dependent ground current

Calculated illustration; not measured waveforms or an executable simulation.

Read each value with its conditions

Typical values describe the stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Texas Instruments · SNVS764Q · December 2017
Official PDF datasheet

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Find LP2950-3.3 in the Components Library to place its schematic symbol and connect its pins.

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