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MCP2301716-bit register-controlled I²C port expander
Expand digital control with direction registers, pull-ups and captured interrupts.
MCP23017 expands an I²C host with two eight-bit digital ports. Dedicated registers select direction, output latches, input polarity, weak pull-ups and interrupt behavior. Transfers include a register address, unlike the direct port-byte interface of PCF8574. The current Microchip reference restricts GPA7 and GPB7 to output use on MCP23017. The other fourteen port pins can serve as inputs or outputs. This page follows that restriction in both the pinout and the example; it does not assume the SPI MCP23S17 has identical limitations. The 5 V example uses GPA0 for a current-limited LED and GPA1 for a button with an enabled weak pull-up. INTA is configured as an open-drain interrupt with an external pull-up. Software sets known output latches before enabling drivers, reads captured input state when handling changes, and keeps the BANK setting consistent with its register addresses.
28Physical pins
MCP23017-E/SPSPDIP-28
Manufacturer-referencedMicrochip Technology
Pin diagram
Select a pin to explore its connection
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MCP23017SPDIP-28Top view
MCP23017SOIC-28Top view
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PIN 1 · Port B
Configurable digital I/OGPB0
Function
Port B bit 0; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 2 · Port B
Configurable digital I/OGPB1
Function
Port B bit 1; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 3 · Port B
Configurable digital I/OGPB2
Function
Port B bit 2; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 4 · Port B
Configurable digital I/OGPB3
Function
Port B bit 3; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 5 · Port B
Configurable digital I/OGPB4
Function
Port B bit 4; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 6 · Port B
Configurable digital I/OGPB5
Function
Port B bit 5; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 7 · Port B
Configurable digital I/OGPB6
Function
Port B bit 6; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 8 · Port B
Output onlyGPB7
Function
The current MCP23017 datasheet restricts this terminal to output use. Do not allocate it to a switch or sensor input.
How to connect
Configure as output LOW and leave open when unused.
Electrical note
GPA7 / GPB7 output-only restriction is specific to MCP23017; do not inherit MCP23S17 input capability.
PIN 9 · Supply
SupplyVDD
Function
Powers logic and I/O. Supply, temperature and bus-rate conditions must be considered together.
How to connect
Use +5 V and 100 nF to VSS10.
PIN 10 · Ground
GroundVSS
Function
Supply and signal reference.
How to connect
Join controller ground.
PIN 11 · Not connected
No connectionNC
Function
Not used on the I²C MCP23017.
How to connect
Leave unconnected.
Electrical note
This is CS on the different SPI MCP23S17.
PIN 12 · I²C bus
I²C clock inputSCL
Function
Clock for register transfers.
How to connect
Connect to host SCL and a suitable pull-up to +5 V.
Electrical note
100 kHz example; faster modes require their own voltage and timing conditions.
PIN 13 · I²C bus
I²C data I/OSDA
Function
Open-drain serial data line.
How to connect
Connect to host SDA and a suitable pull-up to +5 V.
PIN 14 · Not connected
No connectionNC
Function
Not used on the I²C MCP23017.
How to connect
Leave unconnected.
Electrical note
This is SO on the different SPI MCP23S17.
PIN 15 · Hardware address
Address inputA0
Function
Sets hardware address bit 0; all three LOW select 0x20.
How to connect
Tie directly to GND in the example.
Electrical note
Do not leave address inputs floating.
PIN 16 · Hardware address
Address inputA1
Function
Sets hardware address bit 1; all three LOW select 0x20.
How to connect
Tie directly to GND in the example.
Electrical note
Do not leave address inputs floating.
PIN 17 · Hardware address
Address inputA2
Function
Sets hardware address bit 2; all three LOW select 0x20.
How to connect
Tie directly to GND in the example.
Electrical note
Do not leave address inputs floating.
PIN 18 · Hardware reset
Active-LOW reset inputRESET̅
Function
Resets registers and places outputs in the reset state.
How to connect
Use a 10 kΩ pull-up to +5 V and a controller or reset switch to GND.
Electrical note
Minimum LOW reset pulse is 1 µs.
PIN 19 · Interrupt outputs
Port B interruptINTB
Function
Configurable polarity and push-pull/open-drain output. May be mirrored with INTA through IOCON.
How to connect
Leave open in this example; port B interrupts are disabled.
PIN 20 · Interrupt outputs
Port A interruptINTA
Function
Reports enabled input conditions. GPIO or INTCAP reads clear the associated interrupt as specified.
How to connect
Use open-drain mode with 10 kΩ pull-up to +5 V and connect host IRQ.
Electrical note
IOCON.ODR = 1 enables open-drain, active-LOW operation.
PIN 21 · Port A
Configurable digital I/OGPA0
Function
Port A bit 0; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Connect LED cathode; anode through 1 kΩ to +5 V.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 22 · Port A
Configurable digital I/OGPA1
Function
Port A bit 1; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Connect pushbutton to GND; enable input mode and weak pull-up.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 23 · Port A
Configurable digital I/OGPA2
Function
Port A bit 2; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 24 · Port A
Configurable digital I/OGPA3
Function
Port A bit 3; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 25 · Port A
Configurable digital I/OGPA4
Function
Port A bit 4; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 26 · Port A
Configurable digital I/OGPA5
Function
Port A bit 5; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 27 · Port A
Configurable digital I/OGPA6
Function
Port A bit 6; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.
How to connect
Leave open with input weak pull-up enabled in this example.
Electrical note
Read GPIO for terminal levels and OLAT for the output latch.
PIN 28 · Port A
Output onlyGPA7
Function
The current MCP23017 datasheet restricts this terminal to output use. Do not allocate it to a switch or sensor input.
How to connect
Configure as output LOW and leave open when unused.
Electrical note
GPA7 / GPB7 output-only restriction is specific to MCP23017; do not inherit MCP23S17 input capability.
Key specifications
Each port has direction, latch, input and interrupt registers. The host configures these deliberately, then accesses GPIO and OLAT for different purposes.
Digital port lines16 14 I/O + 2 output-only
Example supply5 V
I²C modes100 / 400 kHz · 1.7 MHz under stated conditions
At 4.5–5.5 V−40–125 °C
Package details
MCP23017-E/SP · SPDIP-28
| Property | Details |
|---|---|
| Manufacturer | Microchip Technology |
| Part number | MCP23017-E/SP |
| Package | SPDIP-28 |
| Connections | 28 pins |
| Mounting | Through-hole |
| Lead pitch | 2.54 mm |
| Package code | dip |
| Thermal reference | Board and package dependent; see manufacturer data |
Useful register map
IOCON.BANK = 0
Manufacturer specifications 11 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| IODIRA / IODIRB | 0x00 / 0x01 | 1 = input; 0 = output; obey bit-7 restriction |
| IPOLA / IPOLB | 0x02 / 0x03 | Input polarity inversion |
| GPINTENA / GPINTENB | 0x04 / 0x05 | Interrupt enable per input |
| DEFVALA / DEFVALB | 0x06 / 0x07 | Default comparison values |
| INTCONA / INTCONB | 0x08 / 0x09 | Previous-state versus default comparison |
| IOCON | 0x0A or 0x0B | BANK, MIRROR, SEQOP, ODR and polarity |
| GPPUA / GPPUB | 0x0C / 0x0D | Weak input pull-up enables |
| INTFA / INTFB | 0x0E / 0x0F | Which enabled pins triggered |
| INTCAPA / INTCAPB | 0x10 / 0x11 | Captured port values at interrupt |
| GPIOA / GPIOB | 0x12 / 0x13 | Read terminal levels; writes update latch |
| OLATA / OLATB | 0x14 / 0x15 | Read/write output latches |
No specifications match. Try a parameter name or a unit.
Changing IOCON.BANK changes register addresses. These values intentionally use the reset BANK = 0 arrangement.
Example initialization
5 V · address 0x20 · BANK = 0
Manufacturer specifications 9 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| IOCON 0x0A | Write 0x04 | Open-drain INTA/B; BANK remains 0 |
| OLATA 0x14 | Write 0x01 | Preload GPA0 HIGH so LED starts off |
| OLATB 0x15 | Write 0x00 | Preload unused GPB7 output LOW |
| IODIRA 0x00 | Write 0x7E | A0 and A7 outputs; A1–A6 inputs |
| IODIRB 0x01 | Write 0x7F | B7 output; B0–B6 inputs |
| GPPUA / GPPUB | Write 0x7E / 0x7F | Define unused inputs and pull button HIGH |
| INTCONA 0x08 | Write 0x00 | Compare enabled inputs with previous value |
| GPIOA 0x12 | Read once | Establish current state before enabling interrupt |
| GPINTENA 0x04 | Write 0x02 | Enable GPA1 change notification |
No specifications match. Try a parameter name or a unit.
This sequence reserves both bit-7 pins for outputs and leaves the other unused lines safely defined.
Example control and interrupt service
Separate the output latch from input samples
Manufacturer specifications 7 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| LED on | OLATA bit0 = 0 | GPA0 sinks current through the LED |
| LED off | OLATA bit0 = 1 | GPA0 is HIGH |
| Button state | GPIOA bit1 | LOW when button shorts to GND |
| Captured event | Read INTCAPA 0x10 | Read before another operation clears the event |
| Interrupt source | Read INTFA 0x0E | Flag bits identify enabled causes |
| Output updates | Use OLAT or a software shadow | Avoid rewriting sampled input levels as outputs |
| Firmware debounce | Required for a mechanical button | Interrupt edges are not automatically debounced |
No specifications match. Try a parameter name or a unit.
GPIO/INTCAP reads have interrupt-clear side effects. Design the service order deliberately.
Supply and I/O limits
Conditions distinguish the operating ranges
Manufacturer specifications 10 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| VDD at −40 to +85°C | 1.8–5.5 V | Bus-rate constraints still apply |
| VDD at +85 to +125°C | 4.5–5.5 V | Selected E-grade high-temperature operation |
| GPIO / bus / reset HIGH | ≥ 0.8 VDD | Schmitt-trigger inputs |
| GPIO / bus / reset LOW | ≤ 0.2 VDD | Schmitt-trigger inputs |
| Address HIGH / LOW | ≥ 0.25 VDD + 0.8 V / ≤ 0.15 VDD | A0, A1 and A2 |
| GPIO LOW | ≤ 0.6 V at 8 mA | VDD 4.5 V |
| GPIO HIGH | ≥ VDD − 0.7 V at −3 mA | VDD 4.5 V |
| Weak pull-up current | 75 µA typical; 40–115 µA | VDD 5 V; pin at GND |
| Supply current | 1 mA maximum | SCL/SCK 1 MHz |
| Standby current | 1 µA max. through +85°C | 3 µA max. at +85–125°C and 4.5–5.5 V |
No specifications match. Try a parameter name or a unit.
The 25 mA per-output figure is an absolute maximum; loaded voltage specifications provide the usable drive conditions.
Bus-rate and reset requirements
Use the correct supply for each mode
Manufacturer specifications 7 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| 100 kHz | VDD 1.8–5.5 V | SCL HIGH ≥4 µs; LOW ≥4.7 µs |
| 400 kHz | VDD 2.7–5.5 V | SCL HIGH ≥0.6 µs; LOW ≥1.3 µs |
| 1.7 MHz | VDD 4.5–5.5 V | SCL HIGH ≥0.12 µs; LOW ≥0.32 µs |
| Bus capacitance | 400 pF at 100/400 kHz | 100 pF at 1.7 MHz |
| Maximum rise time | 1000 / 300 / 160 ns | 100 kHz / 400 kHz / 1.7 MHz |
| Reset LOW pulse | 1 µs minimum | RESET must be externally biased |
| Output update delay | 500 ns maximum | Specified GPIO timing conditions |
No specifications match. Try a parameter name or a unit.
The example uses 100 kHz and 4.7 kΩ pull-ups on a short bus. Recalculate pull-ups for the actual capacitance and speed.
Physical wiring
SPDIP-28 / SOIC-28 selected pin map
Manufacturer specifications 8 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| Power | VDD9 +5 V; VSS10 GND | 100 nF at the IC |
| I²C | SCL12 and SDA13 | 4.7 kΩ pull-ups to +5 V |
| Address | A0 pin15, A1 pin16, A2 pin17 to GND | 7-bit address 0x20 |
| Reset | RESET18 with 10 kΩ pull-up | Controller reset or switch may pull LOW |
| LED | GPA0 pin21 to cathode | Anode through 1 kΩ to +5 V |
| Button | GPA1 pin22 to switch to GND | GPPUA bit1 enabled |
| Interrupt | INTA20 to host IRQ | 10 kΩ pull-up; IOCON.ODR = 1 |
| Unused terminals | NC11/14 and INTB19 open | A7/B7 outputs LOW and open; other unused GPIO pulled up |
No specifications match. Try a parameter name or a unit.
The controller and pull-ups use the same 5 V logic domain. Do not assume 3.3 V meets the 5 V input HIGH threshold.
Packages and stress limits
MCP23017-E/SP · SPDIP-28
Manufacturer specifications 7 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| SP package | SPDIP-28; 2.54 mm pitch | 7.62 mm row spacing |
| SO package | Wide SOIC-28; 1.27 mm pitch | 7.50 mm body width |
| NC pins | 11 and 14 on these packages | The imported logical symbol has 26 electrical pins; the physical map has 28 |
| Maximum output current | ±25 mA absolute maximum per pin | Not a recommended continuous target |
| Supply/ground absolute current | 125 mA into VDD; 150 mA out of VSS | Sum loads and observe thermal limits |
| Storage temperature | −65 to +150°C | Unpowered |
| MCP23S17 distinction | SPI interface and different pin use | Do not copy its CS/SO wiring or bit-7 input capability |
No specifications match. Try a parameter name or a unit.
Package selection preserves the physical pin numbers and uses the appropriate footprint.
Connections by function
Select a pin for its function, connection guidance and electrical notes.
Port B8 pins
Supply1 pin
Ground1 pin
Not connected2 pins
I²C bus2 pins
Hardware address3 pins
Hardware reset1 pin
Interrupt outputs2 pins
Port A8 pins
Port B8 pins
Supply1 pin
Ground1 pin
Not connected2 pins
I²C bus2 pins
Hardware address3 pins
Hardware reset1 pin
Interrupt outputs2 pins
Port A8 pins
MCP23017 at a glance
Follow the labeled connections and functional stages
How it works
3 stages · Explore one step at a time
Initialize known states
After reset, preload output latches and select directions before using outputs. Keep unused inputs defined with pull-ups.
Exchange register data
Send the device address, register address and data. BANK = 0 gives paired A/B register addresses used here.
Service captured events
Enable selected interrupt sources. Read INTCAP to retrieve the captured port state, then debounce and process the event.
Step 1 of 3
MCP23017 in a circuit
A defined startup sequence and captured input changes.
Connect it, step by step
Follow the component values and pin connections
Connect and reset
Power, bypass and reset the IC; ground A2–A0 and connect I²C.
Set directions
Preload latches, then set IODIRA 7E and IODIRB 7F. Both bit-7 pins remain outputs.
Drive and read
Write OLATA bit0 for the LED; read GPA1 or captured port A state for the button.
Inside MCP23017
Register-controlled ports with direction, latches and event capture.
Explore the circuit
Select a stage to see its role and connections
Address registers
The I²C host selects a register before exchanging data.
Control ports
IODIR, OLAT and GPPU define direction, driven value and weak pull-ups.
Capture changes
Interrupt logic records selected input events and exposes flags and captured values.
Selected packageSPDIP-28MCP23017-E/SP
Physical connections28 pinsPackage-specific numbering
Reference collection8 tables59 parameters & pin functions
Pin reference
Signal names, electrical functions and connection guidance
Physical pin numbers28 pins
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| Pin | Signal | Type | Function & connection |
|---|---|---|---|
| GPB0 | Configurable digital I/O | Port B bit 0; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPB1 | Configurable digital I/O | Port B bit 1; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPB2 | Configurable digital I/O | Port B bit 2; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPB3 | Configurable digital I/O | Port B bit 3; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPB4 | Configurable digital I/O | Port B bit 4; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPB5 | Configurable digital I/O | Port B bit 5; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPB6 | Configurable digital I/O | Port B bit 6; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPB7 | Output only | The current MCP23017 datasheet restricts this terminal to output use. Do not allocate it to a switch or sensor input.Connection guidanceConfigure as output LOW and leave open when unused. GPA7 / GPB7 output-only restriction is specific to MCP23017; do not inherit MCP23S17 input capability. | |
| VDD | Supply | Powers logic and I/O. Supply, temperature and bus-rate conditions must be considered together.Connection guidanceUse +5 V and 100 nF to VSS10. | |
| VSS | Ground | Supply and signal reference.Connection guidanceJoin controller ground. | |
| NC | No connection | Not used on the I²C MCP23017.Connection guidanceLeave unconnected. This is CS on the different SPI MCP23S17. | |
| SCL | I²C clock input | Clock for register transfers.Connection guidanceConnect to host SCL and a suitable pull-up to +5 V. 100 kHz example; faster modes require their own voltage and timing conditions. | |
| SDA | I²C data I/O | Open-drain serial data line.Connection guidanceConnect to host SDA and a suitable pull-up to +5 V. | |
| NC | No connection | Not used on the I²C MCP23017.Connection guidanceLeave unconnected. This is SO on the different SPI MCP23S17. | |
| A0 | Address input | Sets hardware address bit 0; all three LOW select 0x20.Connection guidanceTie directly to GND in the example. Do not leave address inputs floating. | |
| A1 | Address input | Sets hardware address bit 1; all three LOW select 0x20.Connection guidanceTie directly to GND in the example. Do not leave address inputs floating. | |
| A2 | Address input | Sets hardware address bit 2; all three LOW select 0x20.Connection guidanceTie directly to GND in the example. Do not leave address inputs floating. | |
| RESET̅ | Active-LOW reset input | Resets registers and places outputs in the reset state.Connection guidanceUse a 10 kΩ pull-up to +5 V and a controller or reset switch to GND. Minimum LOW reset pulse is 1 µs. | |
| INTB | Port B interrupt | Configurable polarity and push-pull/open-drain output. May be mirrored with INTA through IOCON.Connection guidanceLeave open in this example; port B interrupts are disabled. | |
| INTA | Port A interrupt | Reports enabled input conditions. GPIO or INTCAP reads clear the associated interrupt as specified.Connection guidanceUse open-drain mode with 10 kΩ pull-up to +5 V and connect host IRQ. IOCON.ODR = 1 enables open-drain, active-LOW operation. | |
| GPA0 | Configurable digital I/O | Port A bit 0; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceConnect LED cathode; anode through 1 kΩ to +5 V. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPA1 | Configurable digital I/O | Port A bit 1; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceConnect pushbutton to GND; enable input mode and weak pull-up. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPA2 | Configurable digital I/O | Port A bit 2; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPA3 | Configurable digital I/O | Port A bit 3; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPA4 | Configurable digital I/O | Port A bit 4; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPA5 | Configurable digital I/O | Port A bit 5; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPA6 | Configurable digital I/O | Port A bit 6; IODIR selects input/output, GPPU enables weak pull-up, and interrupt registers control input-change detection.Connection guidanceLeave open with input weak pull-up enabled in this example. Read GPIO for terminal levels and OLAT for the output latch. | |
| GPA7 | Output only | The current MCP23017 datasheet restricts this terminal to output use. Do not allocate it to a switch or sensor input.Connection guidanceConfigure as output LOW and leave open when unused. GPA7 / GPB7 output-only restriction is specific to MCP23017; do not inherit MCP23S17 input capability. |
No pins match these filters. Try another signal name or reset the filters.
Useful register map
IOCON.BANK = 0
Manufacturer-referenced values11 parameters
Scroll within the table to see all columns and rows.
| Parameter | Value | Conditions / notes |
|---|---|---|
| IODIRA / IODIRB | 0x00 / 0x01 | 1 = input; 0 = output; obey bit-7 restriction |
| IPOLA / IPOLB | 0x02 / 0x03 | Input polarity inversion |
| GPINTENA / GPINTENB | 0x04 / 0x05 | Interrupt enable per input |
| DEFVALA / DEFVALB | 0x06 / 0x07 | Default comparison values |
| INTCONA / INTCONB | 0x08 / 0x09 | Previous-state versus default comparison |
| IOCON | 0x0A or 0x0B | BANK, MIRROR, SEQOP, ODR and polarity |
| GPPUA / GPPUB | 0x0C / 0x0D | Weak input pull-up enables |
| INTFA / INTFB | 0x0E / 0x0F | Which enabled pins triggered |
| INTCAPA / INTCAPB | 0x10 / 0x11 | Captured port values at interrupt |
| GPIOA / GPIOB | 0x12 / 0x13 | Read terminal levels; writes update latch |
| OLATA / OLATB | 0x14 / 0x15 | Read/write output latches |
No specifications match. Try a parameter name or a unit.
Changing IOCON.BANK changes register addresses. These values intentionally use the reset BANK = 0 arrangement.
Example initialization
5 V · address 0x20 · BANK = 0
Manufacturer-referenced values9 parameters
Scroll within the table to see all columns and rows.
| Parameter | Value | Conditions / notes |
|---|---|---|
| IOCON 0x0A | Write 0x04 | Open-drain INTA/B; BANK remains 0 |
| OLATA 0x14 | Write 0x01 | Preload GPA0 HIGH so LED starts off |
| OLATB 0x15 | Write 0x00 | Preload unused GPB7 output LOW |
| IODIRA 0x00 | Write 0x7E | A0 and A7 outputs; A1–A6 inputs |
| IODIRB 0x01 | Write 0x7F | B7 output; B0–B6 inputs |
| GPPUA / GPPUB | Write 0x7E / 0x7F | Define unused inputs and pull button HIGH |
| INTCONA 0x08 | Write 0x00 | Compare enabled inputs with previous value |
| GPIOA 0x12 | Read once | Establish current state before enabling interrupt |
| GPINTENA 0x04 | Write 0x02 | Enable GPA1 change notification |
No specifications match. Try a parameter name or a unit.
This sequence reserves both bit-7 pins for outputs and leaves the other unused lines safely defined.
Example control and interrupt service
Separate the output latch from input samples
Manufacturer-referenced values7 parameters
Scroll within the table to see all columns and rows.
| Parameter | Value | Conditions / notes |
|---|---|---|
| LED on | OLATA bit0 = 0 | GPA0 sinks current through the LED |
| LED off | OLATA bit0 = 1 | GPA0 is HIGH |
| Button state | GPIOA bit1 | LOW when button shorts to GND |
| Captured event | Read INTCAPA 0x10 | Read before another operation clears the event |
| Interrupt source | Read INTFA 0x0E | Flag bits identify enabled causes |
| Output updates | Use OLAT or a software shadow | Avoid rewriting sampled input levels as outputs |
| Firmware debounce | Required for a mechanical button | Interrupt edges are not automatically debounced |
No specifications match. Try a parameter name or a unit.
GPIO/INTCAP reads have interrupt-clear side effects. Design the service order deliberately.
Supply and I/O limits
Conditions distinguish the operating ranges
Manufacturer-referenced values10 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| VDD at −40 to +85°C | 1.8–5.5 V | Bus-rate constraints still apply |
| VDD at +85 to +125°C | 4.5–5.5 V | Selected E-grade high-temperature operation |
| GPIO / bus / reset HIGH | ≥ 0.8 VDD | Schmitt-trigger inputs |
| GPIO / bus / reset LOW | ≤ 0.2 VDD | Schmitt-trigger inputs |
| Address HIGH / LOW | ≥ 0.25 VDD + 0.8 V / ≤ 0.15 VDD | A0, A1 and A2 |
| GPIO LOW | ≤ 0.6 V at 8 mA | VDD 4.5 V |
| GPIO HIGH | ≥ VDD − 0.7 V at −3 mA | VDD 4.5 V |
| Weak pull-up current | 75 µA typical; 40–115 µA | VDD 5 V; pin at GND |
| Supply current | 1 mA maximum | SCL/SCK 1 MHz |
| Standby current | 1 µA max. through +85°C | 3 µA max. at +85–125°C and 4.5–5.5 V |
No specifications match. Try a parameter name or a unit.
The 25 mA per-output figure is an absolute maximum; loaded voltage specifications provide the usable drive conditions.
Bus-rate and reset requirements
Use the correct supply for each mode
Manufacturer-referenced values7 parameters
Scroll within the table to see all columns and rows.
| Parameter | Value | Conditions / notes |
|---|---|---|
| 100 kHz | VDD 1.8–5.5 V | SCL HIGH ≥4 µs; LOW ≥4.7 µs |
| 400 kHz | VDD 2.7–5.5 V | SCL HIGH ≥0.6 µs; LOW ≥1.3 µs |
| 1.7 MHz | VDD 4.5–5.5 V | SCL HIGH ≥0.12 µs; LOW ≥0.32 µs |
| Bus capacitance | 400 pF at 100/400 kHz | 100 pF at 1.7 MHz |
| Maximum rise time | 1000 / 300 / 160 ns | 100 kHz / 400 kHz / 1.7 MHz |
| Reset LOW pulse | 1 µs minimum | RESET must be externally biased |
| Output update delay | 500 ns maximum | Specified GPIO timing conditions |
No specifications match. Try a parameter name or a unit.
The example uses 100 kHz and 4.7 kΩ pull-ups on a short bus. Recalculate pull-ups for the actual capacitance and speed.
Physical wiring
SPDIP-28 / SOIC-28 selected pin map
Manufacturer-referenced values8 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| Power | VDD9 +5 V; VSS10 GND | 100 nF at the IC |
| I²C | SCL12 and SDA13 | 4.7 kΩ pull-ups to +5 V |
| Address | A0 pin15, A1 pin16, A2 pin17 to GND | 7-bit address 0x20 |
| Reset | RESET18 with 10 kΩ pull-up | Controller reset or switch may pull LOW |
| LED | GPA0 pin21 to cathode | Anode through 1 kΩ to +5 V |
| Button | GPA1 pin22 to switch to GND | GPPUA bit1 enabled |
| Interrupt | INTA20 to host IRQ | 10 kΩ pull-up; IOCON.ODR = 1 |
| Unused terminals | NC11/14 and INTB19 open | A7/B7 outputs LOW and open; other unused GPIO pulled up |
No specifications match. Try a parameter name or a unit.
The controller and pull-ups use the same 5 V logic domain. Do not assume 3.3 V meets the 5 V input HIGH threshold.
Packages and stress limits
MCP23017-E/SP · SPDIP-28
Manufacturer-referenced values7 parameters
Scroll within the table to see all columns and rows.
| Parameter | Value | Conditions / notes |
|---|---|---|
| SP package | SPDIP-28; 2.54 mm pitch | 7.62 mm row spacing |
| SO package | Wide SOIC-28; 1.27 mm pitch | 7.50 mm body width |
| NC pins | 11 and 14 on these packages | The imported logical symbol has 26 electrical pins; the physical map has 28 |
| Maximum output current | ±25 mA absolute maximum per pin | Not a recommended continuous target |
| Supply/ground absolute current | 125 mA into VDD; 150 mA out of VSS | Sum loads and observe thermal limits |
| Storage temperature | −65 to +150°C | Unpowered |
| MCP23S17 distinction | SPI interface and different pin use | Do not copy its CS/SO wiring or bit-7 input capability |
No specifications match. Try a parameter name or a unit.
Package selection preserves the physical pin numbers and uses the appropriate footprint.
No matching rowsTry a pin name, parameter, unit or test condition, or reset the filters.
Control-panel expansion
Read buttons and control indicator outputs using a small number of host pins.
Manufacturer application guideLatched digital outputs
Maintain independent direction and output-latch state for external control circuitry.
Manufacturer application guideCaptured input events
Use interrupt capture to retain the port state associated with an input change.
Manufacturer application guideTake it into ProTech
Find MCP23017 in the Components Library to place its schematic symbol and connect its pins.
Reference page · circuit simulation model not yet availableOpen ProTech