MCP6022 Reference Tables, Pins & Specifications

Pin reference

Signal names, electrical functions and connection guidance

PDIP-8

Physical pin numbers8 pins

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MCP6022 pin functions and connections
Signal	Type	Function & connection
OUT1	Analog output	Channel A output. Connection guidance Return to IN1− through 20 kΩ; connect a high-impedance meter.
IN1−	Inverting input	Channel A negative-feedback node. Connection guidance Join 20 kΩ from OUT1 and 10 kΩ to signal ground.
IN1+	Non-inverting input	Channel A signal input. Connection guidance Apply VIN = 0.50 V relative to ground.
VSS	Ground return	Supply return shared by both amplifiers. Connection guidance Connect directly to common ground.
IN2+	Non-inverting input	Channel B signal input. Connection guidance Connect to the same VIN in the illustrated follower.
IN2−	Inverting input	Channel B feedback input. Connection guidance Connect directly to OUT2 pin 7.
OUT2	Analog output	Channel B output. Connection guidance Connect to IN2−; leave unloaded or use a high-impedance instrument.
VDD	Positive supply	Positive rail shared by both amplifiers. Connection guidance Connect +5 V; bypass to ground with 100 nF close to pins 8 and 4.

MCP6022-I/P and MCP6022-I/SN

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Supply span	2.5–5.5 V	VDD minus VSS
Industrial ambient range	−40 to +85°C	Selected I-grade parts
Input common-mode interval	VSS − 0.3 V to VDD + 0.3 V	Input voltage and current protection limits still apply
Example rails	VDD8 = 5 V; VSS4 = 0 V	Supply return is also signal ground
Typical current per amplifier	1.0 mA	0.5 mA minimum; 1.35 mA maximum, unloaded at 25°C
Nominal two-channel current	2.0 mA	Before external load current
No VREF or chip-select pin	MCP6022 has two amplifiers	Do not apply MCP6021/6023 single-amplifier pin functions

Unless stated otherwise, electrical values follow the manufacturer 25°C, 2.5–5.5 V, midsupply signal and 10 kΩ-to-midsupply test conditions.

Industrial grade · 25°C unless stated

Manufacturer-referenced values9 parameters

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Parameter	Value	Conditions / notes
Input offset voltage	±500 µV maximum	VCM = 0 V; selected industrial grade
Typical offset drift	±3.5 µV/°C	Characterized over −40 to +125°C
Input bias current	1 pA typical	Room temperature
Bias current at +85°C	30 pA typical; 150 pA maximum	Industrial temperature parts
Input offset current	±1 pA typical	Room temperature
CMRR over full common-mode range	74 dB minimum; 90 dB typical	VDD = 5 V; VCM = −0.3 to 5.3 V
Supply rejection	74 dB minimum; 90 dB typical	VCM = 0 V
Open-loop gain	90 dB minimum; 110 dB typical	VCM = 0; VOUT = VSS + 0.3 to VDD − 0.3 V
Output swing endpoints	VSS + 15 mV to VDD − 20 mV	10 kΩ to midsupply; 0.5 V differential overdrive

The swing test uses input overdrive; do not treat its endpoints as precision closed-loop headroom at arbitrary load.

Typical values at manufacturer AC conditions

Manufacturer-referenced values8 parameters

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Parameter	Value	Conditions / notes
Gain-bandwidth product	10 MHz	Closed-loop bandwidth depends on noise gain
Slew rate	7.0 V/µs	Large-signal slope limit
Phase margin	65°	Gain +1; CL = 60 pF
Settling to 0.2%	250 ns	Gain +1; 100 mV peak-to-peak output
Voltage-noise density	8.7 nV/√Hz	10 kHz
Integrated low-frequency noise	2.9 µV peak-to-peak	0.1–10 Hz
Current-noise density	3 fA/√Hz	1 kHz
THD + noise	0.00053%	1 kHz; gain +1; VDD 5 V; output 0.25–3.25 V; 22 kHz bandwidth

Small-signal bandwidth, large-signal slew and settling describe different limitations.

A fast CMOS amplifier needs short loops

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Local bypass	100 nF in the example	Manufacturer recommends 10–100 nF within 2 mm of VDD
Nearby bulk storage	1 µF or larger	Within 100 mm; may be shared by nearby analog parts
Feedback network	Short routes around each input/output pair	The 20 kΩ / 10 kΩ example is a low-frequency demonstration
Parasitic capacitance	Check feedback resistance against input and board capacitance	High-frequency noise gain can rise and phase margin can fall
Capacitive loads	Choose an isolation network for the actual load	Do not assume stable direct drive of long cables
Input leakage	Clean high-impedance nodes	Temperature, moisture and contamination increase errors
Unused channel	Stable negative feedback to a valid reference	Do not leave its inputs floating

Use the manufacturer capacitive-load and feedback-capacitance guidance for high-frequency designs.

Absolute ratings are not normal operating targets

Manufacturer-referenced values6 parameters

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Parameter	Value	Conditions / notes
Absolute supply	7.0 V	Normal operating upper limit is 5.5 V
Analog-input current	±2 mA absolute maximum	Provide the specified protection if inputs can exceed safe voltage limits
Output / supply-pin current	±30 mA absolute maximum	Not a recommended continuous load current
Junction / storage	150°C maximum / −65 to +150°C	Do not substitute these for ambient operating limits
Extended E-grade offset	±250 µV at 25°C, VDD 5 V, VCM 0 V	A different grade; not used as the I-grade limit here
Extended E-grade ambient	−40 to +125°C	The selected I-grade page uses −40 to +85°C

Power dissipation and board thermal conditions can constrain usable current before an absolute limit is reached.

5 V single supply · common ground

Manufacturer-referenced values8 parameters

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Parameter	Value	Conditions / notes
Input VIN	0.50 V	Pins 3 and 5; common signal ground
Channel A feedback	20 kΩ	OUT1 pin 1 to IN1− pin 2
Channel A ground resistor	10 kΩ	IN1− pin 2 to 0 V
Channel A ideal output	1.50 V	0.50 × (1 + 20 / 10)
Channel B feedback	Direct connection	OUT2 pin 7 to IN2− pin 6
Channel B ideal output	0.50 V	Unity-gain follower
Bypass capacitors	100 nF	VDD pin 8 to ground pin 4
Bulk bypass	1 µF minimum	Nearby between +5 V and GND; may be shared

The supply return and signal ground are common. Keep the bypass loop short.

MCP6022-I/P · PDIP-8

Manufacturer-referenced values5 parameters

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Parameter	Value	Conditions / notes
Lead pitch	2.54 mm	Through-hole
Channel A	OUT1 1; IN1− 2; IN1+ 3	Independent feedback loop
Channel B	IN2+ 5; IN2− 6; OUT2 7	Independent feedback loop
Supply	VSS 4; VDD 8	Shared by both channels
Package orientation	Top view; pin 1 at the marker	Counterclockwise numbering

This dual-amplifier pinout differs from single amplifiers such as TL081 or LM741.