TC4420Non-inverting MOSFET gate driver

Charge and discharge a MOSFET gate with a dedicated driver.

Manufacturer-referenced

Microchip Technology · TC4420CPA

PDIP-8DS21419D · 2012

TC4420 is a non-inverting gate driver that converts a logic signal into short, high-current pulses for charging and discharging a MOSFET gate. It is a driver stage, not a MOSFET power switch or an oscillator. The commercial DIP8 and SOIC8 versions share the same physical pin functions. Both VDD pins, both ground pins and both output pins must be connected. The duplicated contacts carry fast transient currents and are not optional alternatives. Local bypassing and a short driver-to-gate loop are essential to avoid ringing and supply disturbance. The example uses a 12 V driver supply, a 0–5 V PWM input and a 10 Ω gate resistor feeding a grounded-source N-channel MOSFET. A 100 kΩ gate-to-source resistor defines the off state. The 6 A figure is a peak rating under stated conditions; it is not a continuous load-current rating.

Real View

TC4420CPA black PDIP-8 package with silver contacts and readable marking.

Pinout

TC4420CPAPDIP-8Top view

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8Physical pins TC4420CPAPDIP-8 Manufacturer-referencedMicrochip Technology

Pin diagram

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Package map

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TC4420CPAPDIP-8Top view

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PIN 1 · Supply

VDD

Supply

Function

Driver supply

How to connect

Join pin 8 to +12 V in the example; decouple locally.

Key specifications

Charge and discharge a MOSFET gate with a dedicated driver.

Driver supply4.5–18 V

Peak drive6 A typical at 18 V

Commercial ambient0–70 °C

Propagation delay55 ns typical

Package details

TC4420CPA · PDIP-8

Selected package

Selected TC4420 physical package
Property	Details
Manufacturer	Microchip Technology
Part number	TC4420CPA
Package	PDIP-8
Connections	8 pins
Mounting	Through-hole
Lead pitch	2.54 mm
Package code	PDIP-8
Thermal reference	See operating and package limits

Supply and logic

TC4420 C grade

Manufacturer specifications 6 parameters

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Parameter	Value	Conditions / notes
Driver supply	4.5–18 V	Recommended operating range
Ambient	0–70°C	Selected CPA / COA
Guaranteed HIGH input	At least 2.4 V	DC characteristic
Guaranteed LOW input	At most 0.8 V	DC characteristic
Input current	−10 to +10 µA	0 V ≤ VIN ≤ VDD
Input-to-output function	Non-inverting	TC4429 is the inverting alternative

Keep the input defined during startup and supply transitions.

Drive and timing

Manufacturer test conditions

Manufacturer specifications 7 parameters

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Parameter	Value	Conditions / notes
Peak output current	6 A typical	VDD = 18 V; not continuous
Output resistance HIGH	2.1 Ω typical; 2.8 Ω max	18 V; 10 mA
Output resistance LOW	1.5 Ω typical; 2.5 Ω max	18 V; 10 mA
Rise / fall time	25 ns typical; 35 ns max	2500 pF load; Figure 4-1
Propagation delay	55 ns typical; 75 ns max	Figure 4-1
Supply current, input HIGH	0.45 mA typical; 1.5 mA max	VIN = 3 V, static
Supply current, input LOW	55 µA typical; 150 µA max	VIN = 0 V, static

Actual gate current is limited by driver resistance, external resistor, wiring and gate voltage.

Low-side gate drive

12 V driver, 5 V logic

Manufacturer specifications 7 parameters

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Parameter	Value	Conditions / notes
Supply contacts	VDD1 and VDD8 together	100 nF + 1 µF local bypass to GND4/5
Output contacts	OUTPUT6 and OUTPUT7 together	10 Ω series gate resistor
MOSFET source	GND	Use a suitable N-channel device and separate load-current routing
Gate pulldown	100 kΩ	Gate to source
Logic pulldown	10 kΩ	INPUT2 to GND
Example gate-charge budget	Qg = 20 nC, f = 20 kHz	Average charge current Qg × f = 0.4 mA
Gate-charge power	Qg × VDD × f = 4.8 mW	Illustrative, excludes driver static and crossover losses

Gate charge is a selected MOSFET parameter, not a TC4420 specification.

Package and stress

TC4420CPA · PDIP-8

Manufacturer specifications 5 parameters

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Parameter	Value	Conditions / notes
Pitch	2.54 mm	Through-hole
Supply absolute maximum	20 V	Stress ceiling
Power at TA ≤70°C	730 mW PDIP; 470 mW SOIC	Derate and check actual mounting
Duplicate pins	All must be connected	Supply, ground and output pairs
Inductive load	Requires an appropriate flyback/clamp network	The shown teaching load is resistive

Do not route continuous load current through the driver output; it drives the gate.

External connections

Physical package contacts

Manufacturer specifications 8 parameters

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Parameter	Value	Conditions / notes
1 · VDD	Driver supply	Join pin 8 to +12 V in the example; decouple locally.
2 · INPUT	Non-inverting logic input	Apply 0–5 V PWM with a common ground; use a 10 kΩ pulldown.
3 · NC	Unused contact	Leave unconnected.
4 · GND	Driver return	Join pin 5 and the MOSFET source with a short return.
5 · GND	Duplicated driver return	Connect together with pin 4.
6 · OUTPUT	Gate-drive output	Join pin 7; connect through 10 Ω to the MOSFET gate.
7 · OUTPUT	Duplicated gate-drive output	Connect together with pin 6.
8 · VDD	Duplicated supply	Connect together with pin 1.

Connect all supply and return contacts; leave only explicitly unused contacts open.

Connections by function

Select a pin for its function, connection guidance and electrical notes.

Supply2 pins

Inputs1 pin

Not connected1 pin

Ground2 pins

Outputs2 pins

TC4420 working principle: illustrated functional stages, basic circuit and connections — Select the diagram to read it at full resolution.

How it works

3 stages · Explore one step at a time

Step 1 / 3

Input and reference

A valid logic input selects the output state.

Step 2 / 3

Internal control

The driver sources gate charge to turn a low-side MOSFET on.

Step 3 / 3

Output behavior

It sinks gate charge to turn the MOSFET off quickly.

TC4420 reviewed circuit; pin numbers, supply returns and external components are labeled. — All matching node labels connect. Values illustrate the reference configuration.

Connect it, step by step

Follow the component values and pin connections

Power

Connect every specified supply and return contact.

External network

Fit the external components at the numbered pins shown.

Check

Compare the nominal calculation with device and component tolerances.

TC4420 functional cutaway with LOGIC INPUT, LEVEL SHIFT + PREDRIVE, PUSH-PULL OUTPUT, DUPLICATED CONTACTS. — Functional explanation, not a transistor-level schematic or physical die layout.

Explore the circuit

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Input

A valid logic input selects the output state.

Control

The driver sources gate charge to turn a low-side MOSFET on.

Output

It sinks gate charge to turn the MOSFET off quickly.

Selected packagePDIP-8TC4420CPA

Physical connections8 pinsPackage-specific numbering

Reference collection6 tables33 parameters & pin functions