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Non-inverting MOSFET gate driver

TC4420 Specifications

Review TC4420 electrical specifications, operating conditions and package details.

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Key specifications

Charge and discharge a MOSFET gate with a dedicated driver.

Driver supply4.5–18 V
Peak drive6 A typical at 18 V
Commercial ambient0–70 °C
Propagation delay55 ns typical

Package details

TC4420CPA · PDIP-8

Selected package
Selected TC4420 physical package
PropertyDetails
ManufacturerMicrochip Technology
Part numberTC4420CPA
PackagePDIP-8
Connections8 pins
MountingThrough-hole
Lead pitch2.54 mm
Package codePDIP-8
Thermal referenceSee operating and package limits

Supply and logic

TC4420 C grade

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ParameterValueConditions / notes
Driver supply4.5–18 VRecommended operating range
Ambient0–70°CSelected CPA / COA
Guaranteed HIGH inputAt least 2.4 VDC characteristic
Guaranteed LOW inputAt most 0.8 VDC characteristic
Input current−10 to +10 µA0 V ≤ VIN ≤ VDD
Input-to-output functionNon-invertingTC4429 is the inverting alternative

Keep the input defined during startup and supply transitions.

Drive and timing

Manufacturer test conditions

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ParameterValueConditions / notes
Peak output current6 A typicalVDD = 18 V; not continuous
Output resistance HIGH2.1 Ω typical; 2.8 Ω max18 V; 10 mA
Output resistance LOW1.5 Ω typical; 2.5 Ω max18 V; 10 mA
Rise / fall time25 ns typical; 35 ns max2500 pF load; Figure 4-1
Propagation delay55 ns typical; 75 ns maxFigure 4-1
Supply current, input HIGH0.45 mA typical; 1.5 mA maxVIN = 3 V, static
Supply current, input LOW55 µA typical; 150 µA maxVIN = 0 V, static

Actual gate current is limited by driver resistance, external resistor, wiring and gate voltage.

Low-side gate drive

12 V driver, 5 V logic

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ParameterValueConditions / notes
Supply contactsVDD1 and VDD8 together100 nF + 1 µF local bypass to GND4/5
Output contactsOUTPUT6 and OUTPUT7 together10 Ω series gate resistor
MOSFET sourceGNDUse a suitable N-channel device and separate load-current routing
Gate pulldown100 kΩGate to source
Logic pulldown10 kΩINPUT2 to GND
Example gate-charge budgetQg = 20 nC, f = 20 kHzAverage charge current Qg × f = 0.4 mA
Gate-charge powerQg × VDD × f = 4.8 mWIllustrative, excludes driver static and crossover losses

Gate charge is a selected MOSFET parameter, not a TC4420 specification.

Package and stress

TC4420CPA · PDIP-8

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ParameterValueConditions / notes
Pitch2.54 mmThrough-hole
Supply absolute maximum20 VStress ceiling
Power at TA ≤70°C730 mW PDIP; 470 mW SOICDerate and check actual mounting
Duplicate pinsAll must be connectedSupply, ground and output pairs
Inductive loadRequires an appropriate flyback/clamp networkThe shown teaching load is resistive

Do not route continuous load current through the driver output; it drives the gate.

External connections

Physical package contacts

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ParameterValueConditions / notes
1 · VDDDriver supplyJoin pin 8 to +12 V in the example; decouple locally.
2 · INPUTNon-inverting logic inputApply 0–5 V PWM with a common ground; use a 10 kΩ pulldown.
3 · NCUnused contactLeave unconnected.
4 · GNDDriver returnJoin pin 5 and the MOSFET source with a short return.
5 · GNDDuplicated driver returnConnect together with pin 4.
6 · OUTPUTGate-drive outputJoin pin 7; connect through 10 Ω to the MOSFET gate.
7 · OUTPUTDuplicated gate-drive outputConnect together with pin 6.
8 · VDDDuplicated supplyConnect together with pin 1.

Connect all supply and return contacts; leave only explicitly unused contacts open.

Connections by function

Select a pin for its function, connection guidance and electrical notes.

Supply2 pins

Inputs1 pin

Not connected1 pin

Ground2 pins

Outputs2 pins

Read the conditions with every value

Typical values describe stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Official PDF datasheet

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