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Dual FET-input operational amplifier

TL072 Reference Tables

Search the TL072 pin reference and manufacturer-referenced specification tables.

Package view
Selected packagePDIP-8TL072CP
Physical connections8 pinsPackage-specific numbering
Reference collection6 tables29 parameters & pin functions

Pin reference

Signal names, electrical functions and connection guidance

PDIP-8
Physical pin numbers8 pins

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TL072 pin functions and connections
PinSignalTypeFunction & connection
OUT1Analog outputChannel A output.
Connection guidance

Return to IN1− through 20 kΩ; connect a high-impedance meter.

IN1−Inverting inputChannel A negative-feedback node.
Connection guidance

Join 20 kΩ from OUT1 and 10 kΩ to signal ground.

IN1+Non-inverting inputChannel A signal input.
Connection guidance

Apply VIN = 0.50 V relative to the 0 V midpoint.

V−Negative supplyNegative rail shared by both amplifiers.
Connection guidance

Connect −15 V; bypass locally to 0 V with 100 nF.

IN2+Non-inverting inputChannel B signal input.
Connection guidance

Connect to the same VIN in the illustrated follower.

IN2−Inverting inputChannel B feedback input.
Connection guidance

Connect directly to OUT2 pin 7.

OUT2Analog outputChannel B output.
Connection guidance

Connect to IN2−; leave unloaded or use a high-impedance instrument.

V+Positive supplyPositive rail shared by both amplifiers.
Connection guidance

Connect +15 V; bypass locally to 0 V with 100 nF.

PDIP-8 · Top view · Select a pin number to open its interactive pinout.

Operating conditions

TI TL072C · P/D package columns

Manufacturer-referenced values5 parameters

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ParameterValueConditions / notes
Total supply span4.5–40 VV+ minus V−; Rev W, all except NS/PS/M
Ambient temperature0 to +70°CTL072C grade
Recommended input rangeV− + 4 V to V+ + 0.1 VObserve supply and signal restrictions
Example supply+15 V / −15 V0 V is the midpoint
Legacy PS package10–30 V total supplyDifferent column; not the package illustrated here

Values follow the stated revision and package. Do not apply current P/D limits to an unidentified older die.

DC characteristics

±15 V · 25°C unless stated

Manufacturer-referenced values7 parameters

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ParameterValueConditions / notes
Input offset voltage3 mV typical; 10 mV maximumTL072C; RS = 50 Ω
Input offset, full temperature13 mV maximum0–70°C
Input bias current65 pA typical; 200 pA maximum7 nA maximum over temperature
Input offset current5 pA typical; 100 pA maximum10 nA maximum over temperature
Supply current per amplifier1.4 mA typical; 2.5 mA maximumNo load; output at 0 V
Common-mode range±11 V minimum; −12 to +15 V typical±15 V test supply
Output swing±12 V minimum; ±13.5 V typicalRL = 10 kΩ

Typical values describe representative devices; use specified limits for error budgets.

Dynamic characteristics

TI Rev W · P/D packages

Manufacturer-referenced values5 parameters

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ParameterValueConditions / notes
Gain-bandwidth product5.25 MHz typicalP/D package column
Slew rate8 V/µs minimum; 20 V/µs typical10 V input; CL = 100 pF; RL = 2 kΩ
Input voltage noise at 1 kHz37 nV/√Hz typicalAll except PS/NS/M
Input voltage noise at 10 kHz21 nV/√Hz typicalP/D package column
Phase margin56° typicalGain +1; RL = 10 kΩ; CL = 20 pF

Bandwidth, slew rate and settling behavior are different limits; check all three for a changing signal.

Two-channel amplifier example

±15 V rails · 0 V signal reference

Manufacturer-referenced values7 parameters

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ParameterValueConditions / notes
Input VIN0.50 VPins 3 and 5; common signal ground
Channel A feedback20 kΩOUT1 pin 1 to IN1− pin 2
Channel A ground resistor10 kΩIN1− pin 2 to 0 V
Channel A ideal output1.50 V0.50 × (1 + 20 / 10)
Channel B feedbackDirect connectionOUT2 pin 7 to IN2− pin 6
Channel B ideal output0.50 VUnity-gain follower
Bypass capacitors100 nF per railEach supply rail to the 0 V midpoint

The 0 V reference is not the negative supply pin. Keep both rail-bypass loops short.

Physical pin reference

TL072CP · PDIP-8

Manufacturer-referenced values5 parameters

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ParameterValueConditions / notes
Lead pitch2.54 mmThrough-hole
Channel AOUT1 1; IN1− 2; IN1+ 3Independent feedback loop
Channel BIN2+ 5; IN2− 6; OUT2 7Independent feedback loop
SupplyV− 4; V+ 8Shared by both channels
Package orientationTop view; pin 1 at the markerCounterclockwise numbering

This dual-amplifier pinout differs from single amplifiers such as TL081 or LM741.

Read each value with its conditions

Typical values describe the stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Texas Instruments · SLOS080W · July 2025
Official PDF datasheet

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