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Single JFET-input operational amplifier

TL081 Specifications

Review TL081 electrical specifications, operating conditions and package details.

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Key specifications

A JFET input reduces source loading, while external negative feedback determines useful gain.

Supply span6–36 V · total rail-to-rail span
Typical gain-bandwidth4 MHz · specified ±15 V test
C-grade ambient0–70 °C
Typical slew rate16 V/µs · specified test

Operating profile

Supply, signals and operating conditions

TL081 operating profile
ParameterValueConditions / notes
Selected packagePDIP-8TL081CN
Input technologyJFETLow bias at room temperature
Example gain10×0.20 V → 2.00 V, ideal
Use these values with the stated grade and test conditions.

Package details

TL081CN · PDIP-8

Selected package
Selected TL081 physical package
PropertyDetails
ManufacturerSTMicroelectronics
Part numberTL081CN
PackagePDIP-8
Connections8 pins
MountingThrough-hole
Lead pitch2.54 mm
Package codedip
Thermal referenceBoard and package dependent; see manufacturer data

Operating conditions

ST TL081C grade

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ParameterValueConditions / notes
Total supply span6–36 VV+ minus V−
Ambient temperature0 to +70°CC-grade devices
Reference test supply±15 VUsed for electrical values unless stated
Common-mode range±11 V minimum; −12 to +15 V typical±15 V supply; see manufacturer conditions
Example input0.20 VRelative to the 0 V midpoint

A typical range is not a guaranteed operating boundary. Use the specified minimum range for design margin.

DC characteristics

±15 V · 25°C · TL081C

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ParameterValueConditions / notes
Input offset voltage3 mV typical; 10 mV maximumRS = 50 Ω
Input resistance1 TΩ typicalManufacturer Ri characteristic
Input offset current5 pA typical; 100 pA maximumDifference between input currents at 25°C
No-load supply current1.4 mA typical; 2.5 mA maximumPer amplifier
Open-loop gain200 V/mV typical; 25 minimumRL = 2 kΩ; VO = ±10 V

Bias leakage rises rapidly with temperature; room-temperature leakage values do not apply over the full range.

Output and dynamic characteristics

±15 V · specified tests

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ParameterValueConditions / notes
Output swing at RL = 10 kΩ±13.5 V typical; ±12 V minimum25°C
Output swing at RL = 2 kΩ±12 V typical; ±10 V minimum25°C
Gain-bandwidth product4 MHz typical; 2.5 MHz minimumRL = 2 kΩ; CL = 100 pF; f = 100 kHz
Slew rate16 V/µs typical; 8 V/µs minimumUnity gain; 10 V input step; RL = 2 kΩ; CL = 100 pF
Input noise density15 nV/√Hz typicalRS = 100 Ω; 1 kHz

Do not infer output current or stability from bandwidth alone.

Gain-of-ten example

Split-supply non-inverting stage

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ParameterValueConditions / notes
Power rails+15 V / −15 VPins 7 and 4
Input0.20 VIN+ pin 3
Feedback90 kΩOUT pin 6 to IN− pin 2
Ground resistor10 kΩIN− pin 2 to 0 V
Ideal gain / output10 V/V / 2.00 V1 + 90 / 10
Bypass100 nF per railEach rail to the 0 V midpoint
Trim and NCPins 1, 5, 8 openNo offset-trim network in this circuit

The meter is high impedance. Real output includes offset, noise and resistor errors.

Package and pin reference

TL081CN · PDIP-8

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ParameterValueConditions / notes
Pitch2.54 mmThrough-hole
InputsIN− 2; IN+ 3JFET differential pair
Output6Single analog channel
PowerV− 4; V+ 70 V is the external supply midpoint
Offset trim1 and 5Optional; consult the exact manufacturer circuit
No connection8Leave open

Do not confuse TL081’s single-amplifier pinout with the dual TL072 pinout.

Connections by function

Select a pin for its function, connection guidance and electrical notes.

Offset trim2 pins

JFET signal inputs2 pins

Supply2 pins

Analog output1 pin

Not connected1 pin

Read the conditions with every value

Typical values describe stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Official PDF datasheet

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