PIC32CM1216LE00032 peripherals

Each block of the PIC32CM1216LE00032: what it is, the registers that control it and the pins it uses.

PORT

PORT

Port Module

Registers

EIC

EIC

External Interrupt Controller

Registers

Pins

TC0

TC

Basic Timer Counter

Registers

Pins

TC1

TC

Basic Timer Counter

Registers

Pins

TC2

TC

Basic Timer Counter

Registers

Pins

SERCOM0

SERCOM

Serial Communication Interface

Registers

I2CM.CTRLA0x42000400I2CS.CTRLA0x42000400SPIM.CTRLA0x42000400SPIS.CTRLA0x42000400USART_EXT.CTRLA0x42000400USART_INT.CTRLA0x42000400I2CM.CTRLB0x42000404I2CS.CTRLB0x42000404SPIM.CTRLB0x42000404SPIS.CTRLB0x42000404USART_EXT.CTRLB0x42000404USART_INT.CTRLB0x42000404I2CM.CTRLC0x42000408I2CS.CTRLC0x42000408SPIM.CTRLC0x42000408SPIS.CTRLC0x42000408USART_EXT.CTRLC0x42000408USART_INT.CTRLC0x42000408I2CM.BAUD0x4200040CSPIM.BAUD0x4200040CSPIS.BAUD0x4200040CUSART_EXT.BAUD0x4200040CUSART_INT.BAUD0x4200040CUSART_EXT.RXPL0x4200040EUSART_INT.RXPL0x4200040EI2CM.INTENCLR0x42000414I2CS.INTENCLR0x42000414SPIM.INTENCLR0x42000414SPIS.INTENCLR0x42000414USART_EXT.INTENCLR0x42000414USART_INT.INTENCLR0x42000414I2CM.INTENSET0x42000416I2CS.INTENSET0x42000416SPIM.INTENSET0x42000416SPIS.INTENSET0x42000416USART_EXT.INTENSET0x42000416USART_INT.INTENSET0x42000416I2CM.INTFLAG0x42000418I2CS.INTFLAG0x42000418SPIM.INTFLAG0x42000418SPIS.INTFLAG0x42000418USART_EXT.INTFLAG0x42000418USART_INT.INTFLAG0x42000418I2CM.STATUS0x4200041AI2CS.STATUS0x4200041ASPIM.STATUS0x4200041ASPIS.STATUS0x4200041AUSART_EXT.STATUS0x4200041AUSART_INT.STATUS0x4200041AI2CM.SYNCBUSY0x4200041CI2CS.SYNCBUSY0x4200041CSPIM.SYNCBUSY0x4200041CSPIS.SYNCBUSY0x4200041CUSART_EXT.SYNCBUSY0x4200041CUSART_INT.SYNCBUSY0x4200041CUSART_EXT.RXERRCNT0x42000420USART_INT.RXERRCNT0x42000420I2CS.LENGTH0x42000422SPIM.LENGTH0x42000422SPIS.LENGTH0x42000422USART_EXT.LENGTH0x42000422USART_INT.LENGTH0x42000422I2CM.ADDR0x42000424I2CS.ADDR0x42000424SPIM.ADDR0x42000424SPIS.ADDR0x42000424I2CM.DATA0x42000428I2CS.DATA0x42000428SPIM.DATA0x42000428SPIS.DATA0x42000428USART_EXT.DATA0x42000428USART_INT.DATA0x42000428I2CM.DBGCTRL0x42000430SPIM.DBGCTRL0x42000430SPIS.DBGCTRL0x42000430USART_EXT.DBGCTRL0x42000430USART_INT.DBGCTRL0x42000430I2CM.FIFOSPACE0x42000434I2CS.FIFOSPACE0x42000434SPIM.FIFOSPACE0x42000434SPIS.FIFOSPACE0x42000434USART_EXT.FIFOSPACE0x42000434USART_INT.FIFOSPACE0x42000434I2CM.FIFOPTR0x42000436I2CS.FIFOPTR0x42000436SPIM.FIFOPTR0x42000436SPIS.FIFOPTR0x42000436USART_EXT.FIFOPTR0x42000436USART_INT.FIFOPTR0x42000436

Pins

SERCOM1

SERCOM

Serial Communication Interface

Registers

I2CM.CTRLA0x42000800I2CS.CTRLA0x42000800SPIM.CTRLA0x42000800SPIS.CTRLA0x42000800USART_EXT.CTRLA0x42000800USART_INT.CTRLA0x42000800I2CM.CTRLB0x42000804I2CS.CTRLB0x42000804SPIM.CTRLB0x42000804SPIS.CTRLB0x42000804USART_EXT.CTRLB0x42000804USART_INT.CTRLB0x42000804I2CM.CTRLC0x42000808I2CS.CTRLC0x42000808SPIM.CTRLC0x42000808SPIS.CTRLC0x42000808USART_EXT.CTRLC0x42000808USART_INT.CTRLC0x42000808I2CM.BAUD0x4200080CSPIM.BAUD0x4200080CSPIS.BAUD0x4200080CUSART_EXT.BAUD0x4200080CUSART_INT.BAUD0x4200080CUSART_EXT.RXPL0x4200080EUSART_INT.RXPL0x4200080EI2CM.INTENCLR0x42000814I2CS.INTENCLR0x42000814SPIM.INTENCLR0x42000814SPIS.INTENCLR0x42000814USART_EXT.INTENCLR0x42000814USART_INT.INTENCLR0x42000814I2CM.INTENSET0x42000816I2CS.INTENSET0x42000816SPIM.INTENSET0x42000816SPIS.INTENSET0x42000816USART_EXT.INTENSET0x42000816USART_INT.INTENSET0x42000816I2CM.INTFLAG0x42000818I2CS.INTFLAG0x42000818SPIM.INTFLAG0x42000818SPIS.INTFLAG0x42000818USART_EXT.INTFLAG0x42000818USART_INT.INTFLAG0x42000818I2CM.STATUS0x4200081AI2CS.STATUS0x4200081ASPIM.STATUS0x4200081ASPIS.STATUS0x4200081AUSART_EXT.STATUS0x4200081AUSART_INT.STATUS0x4200081AI2CM.SYNCBUSY0x4200081CI2CS.SYNCBUSY0x4200081CSPIM.SYNCBUSY0x4200081CSPIS.SYNCBUSY0x4200081CUSART_EXT.SYNCBUSY0x4200081CUSART_INT.SYNCBUSY0x4200081CUSART_EXT.RXERRCNT0x42000820USART_INT.RXERRCNT0x42000820I2CS.LENGTH0x42000822SPIM.LENGTH0x42000822SPIS.LENGTH0x42000822USART_EXT.LENGTH0x42000822USART_INT.LENGTH0x42000822I2CM.ADDR0x42000824I2CS.ADDR0x42000824SPIM.ADDR0x42000824SPIS.ADDR0x42000824I2CM.DATA0x42000828I2CS.DATA0x42000828SPIM.DATA0x42000828SPIS.DATA0x42000828USART_EXT.DATA0x42000828USART_INT.DATA0x42000828I2CM.DBGCTRL0x42000830SPIM.DBGCTRL0x42000830SPIS.DBGCTRL0x42000830USART_EXT.DBGCTRL0x42000830USART_INT.DBGCTRL0x42000830I2CM.FIFOSPACE0x42000834I2CS.FIFOSPACE0x42000834SPIM.FIFOSPACE0x42000834SPIS.FIFOSPACE0x42000834USART_EXT.FIFOSPACE0x42000834USART_INT.FIFOSPACE0x42000834I2CM.FIFOPTR0x42000836I2CS.FIFOPTR0x42000836SPIM.FIFOPTR0x42000836SPIS.FIFOPTR0x42000836USART_EXT.FIFOPTR0x42000836USART_INT.FIFOPTR0x42000836

Pins

SERCOM2

SERCOM

Serial Communication Interface

Registers

I2CM.CTRLA0x42000C00I2CS.CTRLA0x42000C00SPIM.CTRLA0x42000C00SPIS.CTRLA0x42000C00USART_EXT.CTRLA0x42000C00USART_INT.CTRLA0x42000C00I2CM.CTRLB0x42000C04I2CS.CTRLB0x42000C04SPIM.CTRLB0x42000C04SPIS.CTRLB0x42000C04USART_EXT.CTRLB0x42000C04USART_INT.CTRLB0x42000C04I2CM.CTRLC0x42000C08I2CS.CTRLC0x42000C08SPIM.CTRLC0x42000C08SPIS.CTRLC0x42000C08USART_EXT.CTRLC0x42000C08USART_INT.CTRLC0x42000C08I2CM.BAUD0x42000C0CSPIM.BAUD0x42000C0CSPIS.BAUD0x42000C0CUSART_EXT.BAUD0x42000C0CUSART_INT.BAUD0x42000C0CUSART_EXT.RXPL0x42000C0EUSART_INT.RXPL0x42000C0EI2CM.INTENCLR0x42000C14I2CS.INTENCLR0x42000C14SPIM.INTENCLR0x42000C14SPIS.INTENCLR0x42000C14USART_EXT.INTENCLR0x42000C14USART_INT.INTENCLR0x42000C14I2CM.INTENSET0x42000C16I2CS.INTENSET0x42000C16SPIM.INTENSET0x42000C16SPIS.INTENSET0x42000C16USART_EXT.INTENSET0x42000C16USART_INT.INTENSET0x42000C16I2CM.INTFLAG0x42000C18I2CS.INTFLAG0x42000C18SPIM.INTFLAG0x42000C18SPIS.INTFLAG0x42000C18USART_EXT.INTFLAG0x42000C18USART_INT.INTFLAG0x42000C18I2CM.STATUS0x42000C1AI2CS.STATUS0x42000C1ASPIM.STATUS0x42000C1ASPIS.STATUS0x42000C1AUSART_EXT.STATUS0x42000C1AUSART_INT.STATUS0x42000C1AI2CM.SYNCBUSY0x42000C1CI2CS.SYNCBUSY0x42000C1CSPIM.SYNCBUSY0x42000C1CSPIS.SYNCBUSY0x42000C1CUSART_EXT.SYNCBUSY0x42000C1CUSART_INT.SYNCBUSY0x42000C1CUSART_EXT.RXERRCNT0x42000C20USART_INT.RXERRCNT0x42000C20I2CS.LENGTH0x42000C22SPIM.LENGTH0x42000C22SPIS.LENGTH0x42000C22USART_EXT.LENGTH0x42000C22USART_INT.LENGTH0x42000C22I2CM.ADDR0x42000C24I2CS.ADDR0x42000C24SPIM.ADDR0x42000C24SPIS.ADDR0x42000C24I2CM.DATA0x42000C28I2CS.DATA0x42000C28SPIM.DATA0x42000C28SPIS.DATA0x42000C28USART_EXT.DATA0x42000C28USART_INT.DATA0x42000C28I2CM.DBGCTRL0x42000C30SPIM.DBGCTRL0x42000C30SPIS.DBGCTRL0x42000C30USART_EXT.DBGCTRL0x42000C30USART_INT.DBGCTRL0x42000C30I2CM.FIFOSPACE0x42000C34I2CS.FIFOSPACE0x42000C34SPIM.FIFOSPACE0x42000C34SPIS.FIFOSPACE0x42000C34USART_EXT.FIFOSPACE0x42000C34USART_INT.FIFOSPACE0x42000C34I2CM.FIFOPTR0x42000C36I2CS.FIFOPTR0x42000C36SPIM.FIFOPTR0x42000C36SPIS.FIFOPTR0x42000C36USART_EXT.FIFOPTR0x42000C36USART_INT.FIFOPTR0x42000C36

Pins

ADC

ADC

Analog Digital Converter

Registers

Pins

DSU

DSU

Device Service Unit

Registers

DWT

DWT

Data Watchpoint and Trace

Registers

EVSYS

EVSYS

Event System Interface

Registers

CTRLA0x42000000SWEVT0x42000004PRICTRL0x42000008INTPEND0x42000010INTSTATUS0x42000014BUSYCH0x42000018READYUSR0x4200001CCHANNEL0.CHANNEL0x42000020CHANNEL0.CHINTENCLR0x42000024CHANNEL0.CHINTENSET0x42000025CHANNEL0.CHINTFLAG0x42000026CHANNEL0.CHSTATUS0x42000027CHANNEL1.CHANNEL0x42000028CHANNEL1.CHINTENCLR0x4200002CCHANNEL1.CHINTENSET0x4200002DCHANNEL1.CHINTFLAG0x4200002ECHANNEL1.CHSTATUS0x4200002FCHANNEL2.CHANNEL0x42000030CHANNEL2.CHINTENCLR0x42000034CHANNEL2.CHINTENSET0x42000035CHANNEL2.CHINTFLAG0x42000036CHANNEL2.CHSTATUS0x42000037CHANNEL3.CHANNEL0x42000038CHANNEL3.CHINTENCLR0x4200003CCHANNEL3.CHINTENSET0x4200003DCHANNEL3.CHINTFLAG0x4200003ECHANNEL3.CHSTATUS0x4200003FCHANNEL4.CHANNEL0x42000040CHANNEL4.CHINTENCLR0x42000044CHANNEL4.CHINTENSET0x42000045CHANNEL4.CHINTFLAG0x42000046CHANNEL4.CHSTATUS0x42000047CHANNEL5.CHANNEL0x42000048CHANNEL5.CHINTENCLR0x4200004CCHANNEL5.CHINTENSET0x4200004DCHANNEL5.CHINTFLAG0x4200004ECHANNEL5.CHSTATUS0x4200004FCHANNEL6.CHANNEL0x42000050CHANNEL6.CHINTENCLR0x42000054CHANNEL6.CHINTENSET0x42000055CHANNEL6.CHINTFLAG0x42000056CHANNEL6.CHSTATUS0x42000057CHANNEL7.CHANNEL0x42000058CHANNEL7.CHINTENCLR0x4200005CCHANNEL7.CHINTENSET0x4200005DCHANNEL7.CHINTFLAG0x4200005ECHANNEL7.CHSTATUS0x4200005FUSER00x42000120USER10x42000121USER20x42000122USER30x42000123USER40x42000124USER50x42000125USER60x42000126USER70x42000127USER80x42000128USER90x42000129USER100x4200012AUSER110x4200012BUSER120x4200012CUSER130x4200012DUSER140x4200012EUSER150x4200012FUSER160x42000130USER170x42000131USER180x42000132USER190x42000133USER200x42000134USER210x42000135USER220x42000136USER230x42000137USER240x42000138USER250x42000139USER260x4200013AUSER270x4200013B

GCLK

GCLK

Generic Clock Generator

Registers

Pins

NVIC

NVIC

Nested Vectored Interrupt Controller

Registers

OSCCTRL

OSCCTRL

Oscillators Control

Registers

Pins

PTC

PTC

Peripheral Touch Controller

Pins

RTC

RTC

Real-Time Counter

Registers

Pins

TRAM

TRAM

TrustRAM

Registers

CTRLA0x42005400INTENCLR0x42005404INTENSET0x42005405INTFLAG0x42005406STATUS0x42005407SYNCBUSY0x42005408DSCC0x4200540CRAM00x42005600RAM10x42005604RAM20x42005608RAM30x4200560CRAM40x42005610RAM50x42005614RAM60x42005618RAM70x4200561CRAM80x42005620RAM90x42005624RAM100x42005628RAM110x4200562CRAM120x42005630RAM130x42005634RAM140x42005638RAM150x4200563CRAM160x42005640RAM170x42005644RAM180x42005648RAM190x4200564CRAM200x42005650RAM210x42005654RAM220x42005658RAM230x4200565CRAM240x42005660RAM250x42005664RAM260x42005668RAM270x4200566CRAM280x42005670RAM290x42005674RAM300x42005678RAM310x4200567CRAM320x42005680RAM330x42005684RAM340x42005688RAM350x4200568CRAM360x42005690RAM370x42005694RAM380x42005698RAM390x4200569CRAM400x420056A0RAM410x420056A4RAM420x420056A8RAM430x420056ACRAM440x420056B0RAM450x420056B4RAM460x420056B8RAM470x420056BCRAM480x420056C0RAM490x420056C4RAM500x420056C8RAM510x420056CCRAM520x420056D0RAM530x420056D4RAM540x420056D8RAM550x420056DCRAM560x420056E0RAM570x420056E4RAM580x420056E8RAM590x420056ECRAM600x420056F0RAM610x420056F4RAM620x420056F8RAM630x420056FCRAM640x42005700RAM650x42005704RAM660x42005708RAM670x4200570CRAM680x42005710RAM690x42005714RAM700x42005718RAM710x4200571CRAM720x42005720RAM730x42005724RAM740x42005728RAM750x4200572CRAM760x42005730RAM770x42005734RAM780x42005738RAM790x4200573CRAM800x42005740RAM810x42005744RAM820x42005748RAM830x4200574CRAM840x42005750RAM850x42005754RAM860x42005758RAM870x4200575CRAM880x42005760RAM890x42005764RAM900x42005768RAM910x4200576CRAM920x42005770RAM930x42005774RAM940x42005778RAM950x4200577CRAM960x42005780RAM970x42005784RAM980x42005788RAM990x4200578CRAM1000x42005790RAM1010x42005794RAM1020x42005798RAM1030x4200579CRAM1040x420057A0RAM1050x420057A4RAM1060x420057A8RAM1070x420057ACRAM1080x420057B0RAM1090x420057B4RAM1100x420057B8RAM1110x420057BCRAM1120x420057C0RAM1130x420057C4RAM1140x420057C8RAM1150x420057CCRAM1160x420057D0RAM1170x420057D4RAM1180x420057D8RAM1190x420057DCRAM1200x420057E0RAM1210x420057E4RAM1220x420057E8RAM1230x420057ECRAM1240x420057F0RAM1250x420057F4RAM1260x420057F8RAM1270x420057FC

USB

USB

Universal Serial Bus

Registers

CTRLA0x4100A000SYNCBUSY0x4100A002QOSCTRL0x4100A003DEVICE.CTRLB0x4100A008HOST.CTRLB0x4100A008DEVICE.DADD0x4100A00AHOST.HSOFC0x4100A00ADEVICE.STATUS0x4100A00CHOST.STATUS0x4100A00CFSMSTATUS0x4100A00DDEVICE.FNUM0x4100A010HOST.FNUM0x4100A010HOST.FLENHIGH0x4100A012DEVICE.INTENCLR0x4100A014HOST.INTENCLR0x4100A014DEVICE.INTENSET0x4100A018HOST.INTENSET0x4100A018DEVICE.INTFLAG0x4100A01CHOST.INTFLAG0x4100A01CDEVICE.EPINTSMRY0x4100A020HOST.PINTSMRY0x4100A020DESCADD0x4100A024PADCAL0x4100A028DEVICE_ENDPOINT0.EPCFG0x4100A100HOST_PIPE0.PCFG0x4100A100HOST_PIPE0.BINTERVAL0x4100A103DEVICE_ENDPOINT0.EPSTATUSCLR0x4100A104HOST_PIPE0.PSTATUSCLR0x4100A104DEVICE_ENDPOINT0.EPSTATUSSET0x4100A105HOST_PIPE0.PSTATUSSET0x4100A105DEVICE_ENDPOINT0.EPSTATUS0x4100A106HOST_PIPE0.PSTATUS0x4100A106DEVICE_ENDPOINT0.EPINTFLAG0x4100A107HOST_PIPE0.PINTFLAG0x4100A107DEVICE_ENDPOINT0.EPINTENCLR0x4100A108HOST_PIPE0.PINTENCLR0x4100A108DEVICE_ENDPOINT0.EPINTENSET0x4100A109HOST_PIPE0.PINTENSET0x4100A109DEVICE_ENDPOINT1.EPCFG0x4100A120HOST_PIPE1.PCFG0x4100A120HOST_PIPE1.BINTERVAL0x4100A123DEVICE_ENDPOINT1.EPSTATUSCLR0x4100A124HOST_PIPE1.PSTATUSCLR0x4100A124DEVICE_ENDPOINT1.EPSTATUSSET0x4100A125HOST_PIPE1.PSTATUSSET0x4100A125DEVICE_ENDPOINT1.EPSTATUS0x4100A126HOST_PIPE1.PSTATUS0x4100A126DEVICE_ENDPOINT1.EPINTFLAG0x4100A127HOST_PIPE1.PINTFLAG0x4100A127DEVICE_ENDPOINT1.EPINTENCLR0x4100A128HOST_PIPE1.PINTENCLR0x4100A128DEVICE_ENDPOINT1.EPINTENSET0x4100A129HOST_PIPE1.PINTENSET0x4100A129DEVICE_ENDPOINT2.EPCFG0x4100A140HOST_PIPE2.PCFG0x4100A140HOST_PIPE2.BINTERVAL0x4100A143DEVICE_ENDPOINT2.EPSTATUSCLR0x4100A144HOST_PIPE2.PSTATUSCLR0x4100A144DEVICE_ENDPOINT2.EPSTATUSSET0x4100A145HOST_PIPE2.PSTATUSSET0x4100A145DEVICE_ENDPOINT2.EPSTATUS0x4100A146HOST_PIPE2.PSTATUS0x4100A146DEVICE_ENDPOINT2.EPINTFLAG0x4100A147HOST_PIPE2.PINTFLAG0x4100A147DEVICE_ENDPOINT2.EPINTENCLR0x4100A148HOST_PIPE2.PINTENCLR0x4100A148DEVICE_ENDPOINT2.EPINTENSET0x4100A149HOST_PIPE2.PINTENSET0x4100A149DEVICE_ENDPOINT3.EPCFG0x4100A160HOST_PIPE3.PCFG0x4100A160HOST_PIPE3.BINTERVAL0x4100A163DEVICE_ENDPOINT3.EPSTATUSCLR0x4100A164HOST_PIPE3.PSTATUSCLR0x4100A164DEVICE_ENDPOINT3.EPSTATUSSET0x4100A165HOST_PIPE3.PSTATUSSET0x4100A165DEVICE_ENDPOINT3.EPSTATUS0x4100A166HOST_PIPE3.PSTATUS0x4100A166DEVICE_ENDPOINT3.EPINTFLAG0x4100A167HOST_PIPE3.PINTFLAG0x4100A167DEVICE_ENDPOINT3.EPINTENCLR0x4100A168HOST_PIPE3.PINTENCLR0x4100A168DEVICE_ENDPOINT3.EPINTENSET0x4100A169HOST_PIPE3.PINTENSET0x4100A169DEVICE_ENDPOINT4.EPCFG0x4100A180HOST_PIPE4.PCFG0x4100A180HOST_PIPE4.BINTERVAL0x4100A183DEVICE_ENDPOINT4.EPSTATUSCLR0x4100A184HOST_PIPE4.PSTATUSCLR0x4100A184DEVICE_ENDPOINT4.EPSTATUSSET0x4100A185HOST_PIPE4.PSTATUSSET0x4100A185DEVICE_ENDPOINT4.EPSTATUS0x4100A186HOST_PIPE4.PSTATUS0x4100A186DEVICE_ENDPOINT4.EPINTFLAG0x4100A187HOST_PIPE4.PINTFLAG0x4100A187DEVICE_ENDPOINT4.EPINTENCLR0x4100A188HOST_PIPE4.PINTENCLR0x4100A188DEVICE_ENDPOINT4.EPINTENSET0x4100A189HOST_PIPE4.PINTENSET0x4100A189DEVICE_ENDPOINT5.EPCFG0x4100A1A0HOST_PIPE5.PCFG0x4100A1A0HOST_PIPE5.BINTERVAL0x4100A1A3DEVICE_ENDPOINT5.EPSTATUSCLR0x4100A1A4HOST_PIPE5.PSTATUSCLR0x4100A1A4DEVICE_ENDPOINT5.EPSTATUSSET0x4100A1A5HOST_PIPE5.PSTATUSSET0x4100A1A5DEVICE_ENDPOINT5.EPSTATUS0x4100A1A6HOST_PIPE5.PSTATUS0x4100A1A6DEVICE_ENDPOINT5.EPINTFLAG0x4100A1A7HOST_PIPE5.PINTFLAG0x4100A1A7DEVICE_ENDPOINT5.EPINTENCLR0x4100A1A8HOST_PIPE5.PINTENCLR0x4100A1A8DEVICE_ENDPOINT5.EPINTENSET0x4100A1A9HOST_PIPE5.PINTENSET0x4100A1A9DEVICE_ENDPOINT6.EPCFG0x4100A1C0HOST_PIPE6.PCFG0x4100A1C0HOST_PIPE6.BINTERVAL0x4100A1C3DEVICE_ENDPOINT6.EPSTATUSCLR0x4100A1C4HOST_PIPE6.PSTATUSCLR0x4100A1C4DEVICE_ENDPOINT6.EPSTATUSSET0x4100A1C5HOST_PIPE6.PSTATUSSET0x4100A1C5DEVICE_ENDPOINT6.EPSTATUS0x4100A1C6HOST_PIPE6.PSTATUS0x4100A1C6DEVICE_ENDPOINT6.EPINTFLAG0x4100A1C7HOST_PIPE6.PINTFLAG0x4100A1C7DEVICE_ENDPOINT6.EPINTENCLR0x4100A1C8HOST_PIPE6.PINTENCLR0x4100A1C8DEVICE_ENDPOINT6.EPINTENSET0x4100A1C9HOST_PIPE6.PINTENSET0x4100A1C9DEVICE_ENDPOINT7.EPCFG0x4100A1E0HOST_PIPE7.PCFG0x4100A1E0HOST_PIPE7.BINTERVAL0x4100A1E3DEVICE_ENDPOINT7.EPSTATUSCLR0x4100A1E4HOST_PIPE7.PSTATUSCLR0x4100A1E4DEVICE_ENDPOINT7.EPSTATUSSET0x4100A1E5HOST_PIPE7.PSTATUSSET0x4100A1E5DEVICE_ENDPOINT7.EPSTATUS0x4100A1E6HOST_PIPE7.PSTATUS0x4100A1E6DEVICE_ENDPOINT7.EPINTFLAG0x4100A1E7HOST_PIPE7.PINTFLAG0x4100A1E7DEVICE_ENDPOINT7.EPINTENCLR0x4100A1E8HOST_PIPE7.PINTENCLR0x4100A1E8DEVICE_ENDPOINT7.EPINTENSET0x4100A1E9HOST_PIPE7.PINTENSET0x4100A1E9

Pins