Explore MCP2562 pins, signal names, electrical functions and connection guidance for each package.
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LOW requests a dominant bus state; HIGH releases the bus to recessive unless another node is dominant.
Connect to the CAN controller TX output.
Internal pull-up to VIO; prolonged LOW invokes dominant timeout.
Supply and logic reference.
Join controller ground and the intended bus reference.
Powers the transmitter and receiver.
Use 4.5–5.5 V; bypass locally with 100 nF to VSS.
LOW reports a dominant bus, HIGH a recessive bus in Normal mode. Standby reception is filtered.
Connect to CAN controller RX.
Output HIGH level follows VIO, not the 5 V bus supply.
Sets the voltage domain for TXD, RXD and STBY.
Connect to the controller I/O supply, 1.8–5.5 V, and bypass with 100 nF.
This pin is VIO on MCP2562; MCP2561 has SPLIT here instead.
Low-going side of the differential bus during a dominant bit.
Connect to CANL in the twisted pair.
High-going side of the differential bus during a dominant bit.
Connect to CANH in the twisted pair.
LOW selects Normal mode; HIGH selects Standby with a filtered low-power receiver.
Hold LOW for the example, or control from a VIO-compatible GPIO.
Internal pull-up favors standby if left open; drive explicitly.
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