OP07 Reference Tables, Pins & Specifications

Pin reference

Signal names, electrical functions and connection guidance

PDIP-8

Physical pin numbers8 pins

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OP07 pin functions and connections
Signal	Type	Function & connection
NULL1	Optional offset adjustment	First terminal of the optional input-offset trim network. Connection guidance Leave open in the illustrated circuit. Use TI’s trim network only when needed; its other end is pin 8.
IN−	Inverting input	Negative-feedback summing node. Connection guidance Connect the 90 kΩ/10 kΩ resistor junction.
IN+	Non-inverting input	Positive signal input. Connection guidance Apply 0.20 V relative to the 0 V supply midpoint.
V−	Negative supply	Negative power rail. Connection guidance Connect −15 V; bypass locally to 0 V with 100 nF. Not signal ground in this circuit.
NC	No connection	No electrical connection is specified for this pin. Connection guidance Leave unconnected.
OUT	Analog output	Amplifier output and feedback source. Connection guidance Connect 90 kΩ to IN− 2 and a high-impedance output meter.
V+	Positive supply	Positive power rail. Connection guidance Connect +15 V; bypass locally to 0 V with 100 nF.
NULL2	Optional offset adjustment	Second terminal of the optional input-offset trim network. Connection guidance Leave open in the illustrated circuit. Paired with pin 1; this is not the LM741 null-pin arrangement.

TI OP07C reference

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Recommended split supply	±3 to±18 V	6–36 V total span
Example rails	±15 V	0 V midpoint is signal ground
Ambient range	0–70°C	Selected commercial C grade
Common-mode recommended at±15 V	−13 to+13 V	Do not infer rail-to-rail operation
Absolute supply maximum	±22 V	Stress limit, not an operating target
Input absolute limit note	Magnitude no greater than supply or15 V, whichever is less	Manufacturer footnote applies
Local bypass	100 nF per rail to 0 V	Short return paths near pins 7 and 4

Do not substitute the absolute stress values for recommended operation.

±15 V,25°C unless stated; column labels retained

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Input offset voltage	±60 µV typical	±85 µV typical across0–70°C
Offset drift	±0.5 µV/°C typical	C grade; not a guaranteed maximum
Long-term offset drift	±0.4 µV/month typical estimate	Average trend after first30 days; not individually guaranteed
Input bias current	±1.8 nA typical	±2.2 nA typical across0–70°C
Input offset current	±0.8 nA typical	±1.6 nA typical across0–70°C
Bias-current drift	±18 pA/°C typical	C-grade table
Offset adjustment range	±4 mV typical	Rs20 kΩ; optional manufacturer trim network

TI revision H places these C-grade values in the typical column. They are not maximum-error guarantees.

Use the bandwidth and source conditions

Manufacturer-referenced values8 parameters

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Parameter	Value	Conditions / notes
Voltage noise,0.1–10 Hz	0.38 µV peak-to-peak typical	Not RMS
Voltage noise density at10 Hz	10.5 nV/√Hz typical	Input-referred
Voltage noise density at1 kHz	9.8 nV/√Hz typical	Input-referred
Current noise density at1 kHz	0.13 pA/√Hz typical	Source resistance converts it to voltage noise
C-grade CMRR at25°C	100 dB minimum;120 dB typical	VCM±13 V
C-grade CMRR over0–70°C	97 dB minimum;120 dB typical	VCM±13 V
Supply sensitivity at25°C	7 µV/V typical;32 µV/V maximum	VS±3 to±18 V
Supply sensitivity over0–70°C	10 µV/V typical;51 µV/V maximum	Lower is better; table usesµV/V

Noise densities must be integrated over the circuit bandwidth.

Manufacturer test conditions

Manufacturer-referenced values7 parameters

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Check headroom and settling; this is not a high-speed amplifier.

Calculated DC illustration

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
VIN	0.20 V	Non-inverting pin 3
Feedback resistor	90 kΩ	OUT 6 to IN− 2
Ground resistor	10 kΩ	IN− 2 to 0 V midpoint
Ideal gain	10 V/V	1+90/10
Ideal output	2.00 V	0.20×10
Typical offset contribution	About0.60 mV at output	60 µV×noise gain 10; not total error
Unused trim / NC	1 and 8 open; 5 unconnected	Optional offset adjustment omitted

Select resistor ratio tolerance for the required accuracy; the illustration is not calibrated hardware.

OP07CP ·PDIP-8

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Lead pitch	2.54 mm	Through-hole
Input pair	2 IN−;3 IN+	Keep leakage and contamination low
Supply	4 V−;7 V+	Both locally bypassed
Output	6	Return feedback close to the input network
Optional trim	1 NULL1;8 NULL2	Follow the exact manufacturer circuit
No connection	5	Leave open
Thermal layout	Avoid uneven heating near input nodes	Thermoelectric voltages can matter at µV levels

Top view, counterclockwise numbering; pin 1 at the marker.