TM1637 Reference Tables
Search the TM1637 pin reference and manufacturer-referenced specification tables.
Pin reference
Signal names, electrical functions and connection guidance
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| Pin | Signal | Type | Function & connection |
|---|---|---|---|
| GND | Ground | Supply and segment-current return.Connection guidanceConnect to the common ground and the bypass capacitors. | |
| SEG1 / KS1 | Open-drain sink / scan | Sinks current from segment 1; also provides key-scan timing.Connection guidanceConnect to the shared cathodes of segment A across the display. A set display bit enables the corresponding sink during the selected grid slot. | |
| SEG2 / KS2 | Open-drain sink / scan | Sinks current from segment 2; also provides key-scan timing.Connection guidanceConnect to the shared cathodes of segment B across the display. A set display bit enables the corresponding sink during the selected grid slot. | |
| SEG3 / KS3 | Open-drain sink / scan | Sinks current from segment 3; also provides key-scan timing.Connection guidanceConnect to the shared cathodes of segment C across the display. A set display bit enables the corresponding sink during the selected grid slot. | |
| SEG4 / KS4 | Open-drain sink / scan | Sinks current from segment 4; also provides key-scan timing.Connection guidanceConnect to the shared cathodes of segment D across the display. A set display bit enables the corresponding sink during the selected grid slot. | |
| SEG5 / KS5 | Open-drain sink / scan | Sinks current from segment 5; also provides key-scan timing.Connection guidanceConnect to the shared cathodes of segment E across the display. A set display bit enables the corresponding sink during the selected grid slot. | |
| SEG6 / KS6 | Open-drain sink / scan | Sinks current from segment 6; also provides key-scan timing.Connection guidanceConnect to the shared cathodes of segment F across the display. A set display bit enables the corresponding sink during the selected grid slot. | |
| SEG7 / KS7 | Open-drain sink / scan | Sinks current from segment 7; also provides key-scan timing.Connection guidanceConnect to the shared cathodes of segment G across the display. A set display bit enables the corresponding sink during the selected grid slot. | |
| SEG8 / KS8 | Open-drain sink / scan | Sinks current from segment 8; also provides key-scan timing.Connection guidanceConnect to the shared cathodes of segment DP across the display. A set display bit enables the corresponding sink during the selected grid slot. | |
| GRID6 | High-side source | Drives the common anode of digit 6.Connection guidanceConnect to the common anode of display digit 6. Use common-anode LEDs; these outputs are not logic-level GPIO. | |
| GRID5 | High-side source | Drives the common anode of digit 5.Connection guidanceConnect to the common anode of display digit 5. Use common-anode LEDs; these outputs are not logic-level GPIO. | |
| GRID4 | High-side source | Drives the common anode of digit 4.Connection guidanceConnect to the common anode of display digit 4. Use common-anode LEDs; these outputs are not logic-level GPIO. | |
| GRID3 | High-side source | Drives the common anode of digit 3.Connection guidanceConnect to the common anode of display digit 3. Use common-anode LEDs; these outputs are not logic-level GPIO. | |
| GRID2 | High-side source | Drives the common anode of digit 2.Connection guidanceConnect to the common anode of display digit 2. Use common-anode LEDs; these outputs are not logic-level GPIO. | |
| GRID1 | High-side source | Drives the common anode of digit 1.Connection guidanceConnect to the common anode of display digit 1. Use common-anode LEDs; these outputs are not logic-level GPIO. | |
| VDD | Supply | Powers the logic and display drivers.Connection guidanceThe example uses a regulated 5 V rail with 100 nF and 100 µF bypass near the IC. Electrical and timing characteristics are specified at 4.5–5.5 V; follow the purchased part revision. | |
| DIO | Bidirectional data | Transfers command, display and key bytes; the IC pulls this line LOW for acknowledgement.Connection guidanceUse a 10 kΩ pull-up to 5 V and an open-drain or releasable host pin. Release the line for the ninth ACK clock and when reading keys; never contend with the IC output. | |
| CLK | Clock input | Clocks data on rising edges.Connection guidanceUse a 10 kΩ pull-up to 5 V; the example host clocks at 100 kHz. This two-wire protocol is not I²C: no slave address, and bytes are sent least-significant bit first. | |
| K1 | Key input | First row input for the 8 × 2 key matrix.Connection guidanceOptional keys connect to the SEG/KS scan lines as shown in the manufacturer circuit. Internal nominal 10 kΩ pull-down; leave unused key inputs unconnected. | |
| K2 | Key input | Second row input for the 8 × 2 key matrix.Connection guidanceRead with command 0x42; one key code is returned. Combined key presses are not supported; idle key data is 0xFF. |
No pins match these filters. Try another signal name or reset the filters.
Supply and electrical conditions
Distinguish operating conditions from absolute limits
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| Parameter | Value | Conditions / notes |
|---|---|---|
| Nominal application supply | 5 V | V2.4 reference circuit |
| Electrical/timing test supply | 4.5–5.5 V | Published characteristics use this range |
| Input HIGH / LOW | ≥0.7 × VDD / ≤0.3 × VDD | At 5 V: ≥3.5 V HIGH, ≤1.5 V LOW |
| Operating temperature | −40 to +85°C | Board and LED heating must remain within limits |
| No-load current, display OFF | 5 mA maximum | Not total LED supply current |
| Internal oscillator | 450 kHz typical | RC oscillator; display scan is automatic |
| Bypass example | 100 nF ceramic + 100 µF bulk | Place close to VDD16 / GND1 |
| Absolute limits | 7 V supply; 400 mW dissipation | Damage limits, not recommended operating settings |
No specifications match. Try a parameter name or a unit.
Use a compatible host or proper level translation; a 3.3 V HIGH is not guaranteed at a 5 V supply.
Display and key commands
Each command byte is sent LSB first
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| Parameter | Value | Conditions / notes |
|---|---|---|
| 0x40 | Write display, auto increment | Normal mode; addresses advance through six bytes |
| 0x44 | Write display, fixed address | Send the chosen address and one byte |
| 0x42 | Read key-scan code | Release DIO for IC-to-host transfer |
| 0xC0–0xC5 | Set display address | GRID1 through GRID6 respectively |
| 0xC6 and higher | Outside display RAM | Data ignored until a valid address is selected |
| 0x80 | Display OFF | Output blanking command |
| 0x88–0x8F | Display ON + brightness | Low three bits select the PWM setting |
| Test mode bit | Keep cleared | Reserved for manufacturer testing |
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There is no I²C slave address or decimal-to-segment decoder.
Segment bytes and example digits
Example wiring: SEG1…SEG8 = A, B, C, D, E, F, G, DP
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| Parameter | Value | Conditions / notes |
|---|---|---|
| Byte D0…D7 | SEG1…SEG8 | A set bit enables its segment |
| Blank / dash | 0x00 / 0x40 | Dash uses only segment G |
| Digits 0, 1, 2, 3 | 0x3F, 0x06, 0x5B, 0x4F | For the stated segment wiring |
| Digits 4, 5, 6, 7 | 0x66, 0x6D, 0x7D, 0x07 | No automatic font decoding |
| Digits 8, 9 | 0x7F, 0x6F | Decimal point remains off |
| Decimal point | OR the byte with 0x80 | Some modules wire this output to a colon instead |
| Six-digit example 123456 | 06 5B 4F 66 6D 7D | Send after 0xC0 with auto increment enabled |
No specifications match. Try a parameter name or a unit.
A breakout module can have a different digit or colon map; check its wiring.
Eight PWM brightness settings
Duty applies during the selected digit slot
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| Parameter | Value | Conditions / notes |
|---|---|---|
| 0x88 / level 0 | 1/16 | Display ON; minimum PWM |
| 0x89 / level 1 | 2/16 | |
| 0x8A / level 2 | 4/16 | |
| 0x8B / level 3 | 10/16 | The step from level 2 is intentionally large |
| 0x8C / level 4 | 11/16 | |
| 0x8D / level 5 | 12/16 | |
| 0x8E / level 6 | 13/16 | |
| 0x8F / level 7 | 14/16 | Maximum PWM setting |
No specifications match. Try a parameter name or a unit.
PWM duty is not the complete per-LED average duty: digit multiplexing also applies.
Two-wire timing
Use the conservative 100 kHz example for both writing and key reads
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| Parameter | Value | Conditions / notes |
|---|---|---|
| START / STOP | DIO falls / rises while CLK HIGH | Keep DIO stable during ordinary HIGH clock periods |
| Bit order | Least-significant bit first | Different from many SPI devices |
| Acknowledge | Ninth clock; DIO pulled LOW | Host releases DIO after bit 7 |
| Write clock upper specification | 500 kHz at 50% duty | Electrical table maximum, subject to timing limits |
| Key-read clock | Below 250 kHz | Additional instruction in the key-read section |
| Clock pulse width | At least 400 ns | Observe all other timing constraints too |
| Data setup / hold | At least 100 ns / 100 ns | Relative to CLK |
| Waiting time | At least 1 µs | CLK rising to falling in the timing table |
No specifications match. Try a parameter name or a unit.
The 100 kHz demonstration provides margin for pull-ups, wiring capacitance and host timing.
Key scan and output loading
Optional 8 × 2 matrix shares the segment scan lines
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| Parameter | Value | Conditions / notes |
|---|---|---|
| K1 / K2 contacts | Pins 19 / 20 | Two key-return inputs |
| Idle key code | 0xFF | No key reported |
| Simultaneous keys | Not supported | Do not assume rollover or independent key bits |
| Key input bias | 10 kΩ nominal internal pull-down | Unused K1/K2 can remain unconnected |
| Segment sink capability | 20 / 30 / 50 mA min / typ / max | At VO=0.3 V in the electrical table |
| Grid source capability | 80 / 120 / 180 mA min / typ / max | At VO=VDD−2 V |
| Current interpretation | These are output-characteristic test values | Not a guaranteed constant-current setting or a free current budget |
| Display loading | Check LED pulse limits and IC dissipation | Use segment resistors when required by the selected display/current design |
No specifications match. Try a parameter name or a unit.
Unlike MAX7219, TM1637 has no external RSET pin; do not copy the MAX7219 current-setting circuit.
No matching rowsTry a pin name, parameter, unit or test condition, or reset the filters.