Explore MAX485 pins, signal names, electrical functions and connection guidance for each package.
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When enabled, HIGH for A − B ≥ 200 mV and LOW for A − B ≤ −200 mV. High impedance when RE̅ is HIGH.
Connect to a 5 V-compatible controller RX input.
Open receiver inputs produce HIGH; a terminated idle bus needs separately designed bias.
LOW enables RO; HIGH releases RO to high impedance.
Join DE for one direction signal: LOW receive, HIGH transmit.
HIGH enables differential driver outputs; LOW releases the bus.
Drive from the direction GPIO; add a 10 kΩ pull-down for a receive-first startup.
With DE HIGH, DI HIGH makes A higher than B. DI LOW reverses the polarity.
Connect to controller UART TX.
Logic HIGH ≥ 2.0 V; LOW ≤ 0.8 V.
Reference for logic levels and bus common-mode voltage.
Join the controller ground and the intended bus reference conductor.
Non-inverting driver output and receiver input.
Connect A to A on the other node using a twisted pair.
Receiver common-mode operating range −7 to +12 V.
Inverting driver output and receiver input.
Connect B to B on the other node; verify vendor naming at third-party terminals.
Powers the transceiver from a nominal 5 V rail.
Use 4.75–5.25 V and 100 nF directly to pin 5.
This is the 5 V MAX485, not a 3.3 V MAX3485.
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