BETAClassical CANUp to 1 Mbit/s
Stand-alone CAN controller with SPI
MCP2515 Specifications
Review MCP2515 electrical specifications, operating conditions and package details.
Package view
Key specifications
The SPI host configures buffers, filters and timing. The CAN engine performs bus arbitration and error handling through TXCAN and RXCAN. A separate transceiver provides the electrical bus interface.
Operating supply2.7–5.5 V
Message buffers3 TX / 2 RX Six filters · two masks
Selected I-grade−40–85 °C
Package details
MCP2515-I/P · PDIP-18
| Property | Details |
|---|---|
| Manufacturer | Microchip Technology |
| Part number | MCP2515-I/P |
| Package | PDIP-18 |
| Connections | 18 pins |
| Mounting | Through-hole |
| Lead pitch | 2.54 mm |
| Package code | dip |
| Thermal reference | Board and package dependent; see manufacturer data |
Protocol and storage
Classical CAN 2.0B
Manufacturer specifications 7 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| Bus rate | Up to 1 Mbit/s | Subject to oscillator and network timing |
| Identifiers | 11-bit standard / 29-bit extended | Data and remote frames |
| Data field | 0–8 bytes | No CAN FD or bit-rate switching |
| Transmit storage | Three prioritized buffers | Abort and one-shot options |
| Receive storage | Two buffers | Priority and optional rollover |
| Acceptance | Six filters and two masks | Configure before Normal mode |
| External line interface | Required CAN transceiver | TXCAN / RXCAN are logic signals |
No specifications match. Try a parameter name or a unit.
A controller and a transceiver solve different parts of the CAN interface.
Useful SPI instructions
Most significant bit first · separate CS cycle per command
Manufacturer specifications 8 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| RESET | 0xC0 | Initialize and enter Configuration mode |
| READ | 0x03, address, dummy clocks | Consecutive register bytes may follow |
| WRITE | 0x02, address, data… | Sequential register write |
| BIT MODIFY | 0x05, address, mask, data | Only supported registers; mask 1 permits change |
| READ STATUS | 0xA0 | Frequently used RX/TX status |
| RX STATUS | 0xB0 | Received-frame type and matching filter |
| RTS buffer 0 | 0x81 | Request already-loaded TXB0 transmission |
| SPI timing | 10 MHz maximum; 50 ns CS setup/hold | Modes 0 and 3 |
No specifications match. Try a parameter name or a unit.
The controller expects an instruction immediately after CS falls. Raise CS before issuing another instruction.
Operating modes
Request via CANCTRL; confirm via CANSTAT
Manufacturer specifications 6 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| Configuration | REQOP 100 | Required for bit timing, filters, masks and TXRTSCTRL |
| Normal | REQOP 000 | Transmit, receive and acknowledge CAN frames |
| Sleep | REQOP 001 | Oscillator stopped; wake-up conditions apply |
| Loopback | REQOP 010 | Internal communications test without bus transmission |
| Listen-only | REQOP 011 | Observe bus without transmitting or acknowledging |
| Mode confirmation | Read OPMOD bits | A request may wait for pending transmissions |
No specifications match. Try a parameter name or a unit.
Listen-only nodes do not supply the acknowledgment required for a transmitting node’s normal successful frame.
125 kbit/s configuration example
20 MHz external clock · single sample
Manufacturer specifications 8 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| Oscillator period | 50 ns | 1 / 20 MHz |
| BRP register field | 4 | TQ = 2 × (BRP + 1) / FOSC |
| Time quantum | 500 ns | Prescaler division by 10 |
| Segments | Sync 1; Prop 2; PS1 7; PS2 6 | 16 TQ per bit |
| Sample point | (1 + 2 + 7) / 16 = 62.5% | At the end of Phase Segment 1 |
| Synchronization jump width | 1 TQ | Must not exceed PS2 |
| CNF1 / CNF2 / CNF3 | 0x04 / 0xB1 / 0x05 | BTLMODE=1, SAM=0; wake filter/SOF disabled |
| Result | 16 × 500 ns = 8 µs per bit | 125000 bits/s |
No specifications match. Try a parameter name or a unit.
This is the manufacturer’s illustrative timing split, not a universal network prescription. Review propagation, oscillator tolerance and the other nodes.
Supply, clock and logic
MCP2515-I/P and MCP2515-I/SO
Manufacturer specifications 10 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| Operating supply / temperature | 2.7–5.5 V / −40 to +85°C | I grade |
| SPI input HIGH | ≥ 0.7 × VDD | SCK, SI and CS |
| SPI input LOW | ≤ 0.4 × VDD | SCK, SI and CS |
| RXCAN HIGH / LOW | ≥ 2.0 V / ≤ 0.15 × VDD | Different input thresholds from SPI |
| Reset HIGH / LOW | ≥ 0.85 × VDD / ≤ 0.15 × VDD | Schmitt reset input |
| External clock range | 1–25 MHz over 2.7–5.5 V | Up to 40 MHz at 4.5–5.5 V |
| Clock duty cycle | 45–55% | External clock input |
| Active current | 10 mA maximum | 5.5 V, oscillator25 MHz, SPI1 MHz, SO open |
| Sleep current, I grade | 5 µA maximum | Defined inputs and CS / TXnRTS HIGH |
| Hardware reset LOW | 2 µs minimum | Then allow 128 oscillator cycles for startup |
No specifications match. Try a parameter name or a unit.
At 5 V, a 3.3 V HIGH does not meet the SPI 0.7 VDD threshold. Use compatible levels or translation.
Controller-to-CAN connection
5 V logic · 20 MHz · 125 kbit/s
Manufacturer specifications 8 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| Host SPI | SCK13, MOSI→SI14, SO15→MISO, CS16 | Start with mode0 at1 MHz |
| Host control | INT12→interrupt; RESET17→reset output | 10 kΩ pull-ups on CS and RESET |
| External oscillator | 20 MHz output→OSC1 pin8 | OSC2 pin7 open; oscillator bypass per its data |
| CAN controller/transceiver | TXCAN1→MCP2562 TXD1; RXD4→RXCAN2 | Logic connections, not bus pins |
| MCP2562 supplies | VDD3 and VIO5 to5 V; VSS2 GND | 100 nF local supply bypass; STBY8 LOW |
| Bus | MCP2562 CANH7 and CANL6 | Twisted pair; two120 Ω end terminators |
| Unused outputs | CLKOUT3, RX1BF10, RX0BF11 open | Unused TXnRTS inputs have internal pull-ups |
| Firmware | Reset, configure timing and filters, enter Normal mode | Another matching normal node must acknowledge |
No specifications match. Try a parameter name or a unit.
All ground references are common in this teaching circuit. Protection, isolation and cable length require a system-specific design.
Packages and stress limits
MCP2515-I/P · PDIP-18
Manufacturer specifications 6 parameters
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| Parameter | Value | Conditions / notes |
|---|---|---|
| PDIP-18 P | 2.54 mm pitch; 7.62 mm rows | Narrow through-hole package |
| SOIC-18 SO | 1.27 mm pitch; 7.50 mm body width | Wide SOIC, not a narrow 3.9 mm body |
| Other packages | 20-lead TSSOP / QFN | Different contact maps; not interchangeable with18-pin views |
| Supply absolute maximum | 7.0 V | Normal operation ends at5.5 V |
| I/O absolute range | −0.6 to VDD + 1.0 V | Stress limits, not recommended input levels |
| Storage temperature | −65 to +150°C | Unpowered |
No specifications match. Try a parameter name or a unit.
Review the exact orderable and fabrication allowances before using the downloadable original footprints.
Connections by function
Select a pin for its function, connection guidance and electrical notes.