Explore UC3842A pins, signal names, electrical functions and connection guidance for each package.
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Controls the current comparator threshold and accepts the loop-compensation network.
Leave externally open in the fixed-demand bench circuit.
Do not force the node against its amplifier drive.
Inverting error-amplifier input, compared with an internal nominal 2.5 V reference.
Ground in this open-loop scope demonstration to request the maximum current threshold.
A real regulated converter needs feedback and compensation; this example has no power stage.
Ends an output pulse when the sense voltage exceeds the COMP-derived threshold; the maximum threshold is approximately 1 V.
Feed a 0–1.25 V control through 1 kΩ, with 1 nF to GND at the input.
DC above the threshold can leave very short pulses because turn-off has propagation delay.
Connects both the charging resistor and timing capacitor.
Use RT = 10 kΩ from VREF8 to this pin and CT = 3.3 nF from this pin to GND.
RT returns to VREF, not to ground.
Control and driver return in the selected eight-pin packages.
Join timing, bypass, control and scope grounds locally.
Pulsed output intended to drive an external power switch through a suitable gate resistor.
Connect a high-impedance scope and a 10 kΩ load to GND in this demonstration.
The 1 A headline is peak driver capability, not a continuous load supply.
Undervoltage lockout keeps OUTPUT low until startup voltage is reached.
Use regulated +18 V with 10 µF and 100 nF local bypass.
UC3842A starts around 16 V; a 12 V supply may never start it.
Bias and oscillator supply available after startup.
Bypass with 1 µF; feed RT and the low-current sense-control network.
Keep normal external reference load at or below 10 mA.
BETA