Explore LM567 pins, signal names, electrical functions and connection guidance for each package.
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Sets output filtering and detection delay.
Connect 2.2 µF to ground; positive end at pin 1.
Use C3 at least twice the loop-filter capacitor in the illustrated design.
Filters the phase-locked-loop control signal.
Connect 1 µF to ground; positive end at pin 2.
This capacitor affects capture bandwidth and response time.
Accepts the tone to be detected.
Feed the grounded signal generator through a 100 nF series capacitor.
Use 100 mV RMS near 909 Hz for this example, not a rail-level digital signal.
Powers the decoder circuitry.
Connect regulated +5 V, with 100 nF and 1 µF local bypass to ground.
One side of the oscillator timing resistor.
Connect R1 = 10 kΩ between pins 5 and 6.
The resistor goes between these pins, not from pin 5 to VCC.
Oscillator timing node.
Connect C1 = 100 nF to ground, and the other end of R1 from pin 5.
Use stable timing parts and short traces.
Common supply and signal return.
Join supply negative, filter returns and signal-generator ground.
Sinks current when a sufficient signal is detected in the passband.
Add a 10 kΩ pull-up to +5 V and read with a high-impedance meter.
LOW means detected. Without the pull-up, the released output is not driven HIGH.
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