TLC555 Reference Tables, Pins & Specifications

Pin reference

Signal names, electrical functions and connection guidance

PDIP-8

Physical pin numbers8 pins

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TLC555 pin functions and connections
Signal	Type	Function & connection
GND	Supply return	Common reference for the timer. Connection guidance Connect to circuit ground.
TRIG	Trigger input	Below approximately one-third VDD sets the latch when RESET is inactive. Connection guidance Join THRES6 at the timing capacitor node. A sustained LOW trigger can hold the output HIGH.
OUT	CMOS output	Push-pull timing output. Connection guidance Drive an LED through 4.7 kΩ to ground. Output voltage depends on load. Source capability is lower than sink capability.
RESET	Active-LOW reset	Overrides the comparators, forcing OUT LOW and DISCH conducting. Connection guidance Tie to VDD for continuous oscillation. Never leave RESET floating.
CONT	Comparator reference	Approximately two-thirds VDD with no external drive. Connection guidance Bypass to ground with 10 nF. Changing CONT changes timing thresholds and equations.
THRES	Threshold input	Above CONT resets the latch when TRIG is above its lower threshold. Connection guidance Join TRIG2 at the timing capacitor node.
DISCH	Discharge switch	Provides a low-impedance path to ground while OUT is LOW. Connection guidance Connect to the RA/RB junction. Not a second push-pull output.
VDD	Positive supply	Power for the CMOS timer. Connection guidance Apply +5 V; bypass to GND1 locally with 100 nF. Selected TLC555C grade: recommended 2–15 V, 0–70°C.

TLC555CP / TLC555CDR

Manufacturer-referenced values5 parameters

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Parameter	Value	Conditions / notes
Supply	2–15 V	C grade; example uses 5 V
Ambient	0 to +70°C	C grade in either selected package
Industrial grade comparison	3–15 V; −40 to +85°C	TLC555I, not the selected parts
Nominal timing window	1/3 to 2/3 VDD	CONT unmodulated
Typical output capabilities	100 mA sink; 10 mA source	Feature values, not guaranteed rail-level drive

Observe the electrical test conditions and thermal limits; output capability is asymmetric.

25°C unless stated

Manufacturer-referenced values8 parameters

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Parameter	Value	Conditions / notes
Supply current	180 µA typical; 350 µA max	5 V; expected timing configurations
Supply current over C-grade temperature	500 µA max	5 V; 0–70°C
Trigger threshold	1.36–1.96 V; 1.66 V typical	5 V, 25°C
Upper threshold	2.8–3.8 V; 3.3 V typical	5 V, 25°C
HIGH output	4.8 V typical; 4.1 V minimum	Sourcing 1 mA
LOW output	0.21 V typical; 0.4 V maximum	Sinking 8 mA
Timing-input current	10 pA typical	25°C; TRIG and THRES
Timing-input capacitance	2.1 pF typical	Each timing input

Typical values describe characterization, not guaranteed performance for every device.

Standard two-resistor astable

Manufacturer-referenced values5 parameters

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Parameter	Value	Conditions / notes
HIGH time	ln(2) × (RA + RB) × C	Charging interval
LOW time	ln(2) × RB × C	Discharge interval
Frequency	1 / [ln(2) × (RA + 2RB) × C]	Ω, F, seconds
HIGH duty cycle	(RA + RB) / (RA + 2RB)	Ordinary astable duty exceeds 50%
Monostable duration	Approximately 1.1 × R × C	Clean trigger must release before the interval finishes

Initial power-up timing differs from subsequent cycles. Comparator limits, leakage and component tolerance change real timing.

5 V · nominal 0.988 Hz

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
RA / RB	10 kΩ / 68 kΩ	RA from VDD8 to DISCH7; RB from DISCH7 to TRIG2/THRES6
Timing capacitor	10 µF	Positive at timing node, negative at ground
HIGH / LOW interval	0.541 / 0.471 s	Ideal steady-state values
HIGH duty	53.42%	LED anode driven through 4.7 kΩ from OUT3
LED current estimate	Approximately 0.64 mA	(5−2)/4700; actual output and LED drops vary
RESET / CONT	4 to VDD; 5 through 10 nF to GND	No floating controls
Local bypass	100 nF	VDD8 directly to GND1

All ground symbols are the same return. Use a driver for larger loads.

RESET first, then trigger

Manufacturer-referenced values4 parameters

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The ordinary timing equations assume CONT is bypassed and RESET is HIGH.

TLC555CP · PDIP-8

Manufacturer-referenced values7 parameters

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Parameter	Value	Conditions / notes
Pitch	2.54 mm	Through-hole
Absolute supply	−0.3 to +18 V	Stress rating, not the 15 V operating limit
Absolute input	−0.3 V to VDD	Any input
Absolute output/discharge sink	150 mA	Stress limit, not recommended continuous loading
Absolute output source	15 mA	Stress limit
Storage	−65 to +150°C	Unpowered
Junction-to-ambient reference	93.1°C/W PDIP; 138.9°C/W SOIC	TI thermal test conditions; board-dependent

Do not design continuous operation at an absolute maximum.