ProteusAdder, Half Adders, Half adders in proteus, half adder through XOR and AND Gate


Adder, Half Adders, Half adders in proteus, half adder through XOR and AND GateHi Learners! Welcome from the team of The Engineering Projects. We hope you are having a Productive Day. To add more reproduction, Let’s Learn about another Circuit about Digital Circuits. Present Day, we will know:

  1. What is an Adder?
  2. What is Half Adder?
  3. Why is it called Half Adder?
  4. Truth Tables of Half Adder?
  5. Logics of Half Adder.
  6. Practical Implementation in Proteus ISIS.
  7. Advantages of Half Adder.
  8. Disadvantages of Half Adder.

Let’s start the Learning.

Adders

Before discussing Half Adder just have a look at what are we trying to make. we describe an Adder as:

” An Adder is a is a Digital Circuit that can Add two numbers, usually two Binary Numbers in Computer World”

Adders can especially be designed so that can add other Number systems also. For Example, Binary Coded Decimal system, Hexadecimal system.

One can use the Adders in the Circuits of Table Index Calculation, Address Coding etcetera.

There are two types of Adders:

  1. Half Adder
  2. Full Adder

In today’s Tutorial, We’ll just emphasize at Half Adder only.

Half Adder 

First of all, let me Introduce the Half Adders:

“A Half Adder is a type of Adder that is the Combinational Arithmetic Circuit, having the ability to add two numbers and as a result Produces two bits, called Sum bit and Carry Bit.”

In School’s Mathematics, we used to add two numbers by writing the numbers in the form of columns and then add the units of both the numbers with each other and followed the same procedure for tens.

By the same token, Adders add two bits. We consider that adder also do so with the bits. We denote the Sum through the Greek summation symbol whereas, the Carry is denoted by  C0 .

For Example, When we add the Number 1 and 0 in different combinations, the adder add them as:

0                                                0                                          1                                                           1

+0                                             +1                                        +0                                                        +1


0                                                1                                            1                                                         0 (carry=1)

A half Adder can only add the number containing one bit If we use only One Gate. Hence, for a Proper working of Half Adder we need another Logic Gate that can store and work with the carry bit.

For this Purpose, we use two Gates that will be describe next.

Why is it Called Half Adder

With the Name, a question pops in the mind that why we called this Circuit as Half Adder. The reason is, when we add the two numbers, we get the output that may or may not contain carry. Yet, if it has carry in it then there is no module that can save the carry for the next bit.

It means, when we add two numbers, the carry is displayed, but that can no longer be used with the next bit. that is the procedure to add the two numbers, thus one can get the wrong output.

Block Diagram

We can Define the Block Diagrams as:

A Diagram of the system that Shows the Relationship of the Components by denoting the Components as blocks and the relationship between them through the flow Lines is called Block Diagram.”

On the Basis of above Discussion, we design the Block Diagram of Half Adder as:

Adder, Half Adders, Half adders in proteus, half adder through XOR and AND Gate

You can see, Half adder contains two inputs and two outputs.

Logical Circuit

In today’s lesson, we’ll construct the Half Adder through two simple and easy Gates named :

  1. XOR Gate
  2. AND Gate

Let’s have a quick recap with the working of both Logic Gates.

The Truth Table of XOR Gate is given next:

ABxor gate, exclusive or gate, exclusive gates in proteus, proteus implementation of xor gate
000
011
101
110

One can clearly observe that the XOR Gate gives the output HIGH only, when the inputs are inverse of each other.

Similarly,

The Truth Table of AND Gate is given as:

ABA.B
000
010
100
111

The output of AND Gate is HIGH only when both the input are HIGH.

Truss, for Sum bit, we use XOR Gate

  SUM =A XOR B

and for Cary bit, we use AND Gate

CARRY=A AND B

Let’s move towards the Practical implementation of Circuit of Half Adder in Proteus ISIS.

Designing of Half Adder in Proteus ISIS

To design the circuit of Half Adder, we need the following Devices:

Material required:

  1. AND Gate.
  2. XOR Gate.
  3. Logic toggle.
  4. LED.
  5. Ground Terminal.
  6. Connecting Wire.

Procedure:

  • Choose the first four components from the Pick Library Button Labeled as ‘P’.
  • Arrange the XOR Gate above and AND gate just below the XOR Gate.
  •  Connect the Logic Toggles on the Inputs of XOR Gate.
  • Join the inputs of AND Gate with the Inputs of XOR Gate.
  • Connect the LEDs with the output Terminals of both Gates.
  • Add the ground terminal  with both the LEDs.
  • The Circuit should look like this:

Adder, Half Adders, Half adders in proteus, half adder through XOR and AND Gate

You can see that when the Logic Toggles are arranged so, according to the Inputs of the Truth Table, we Get the required outputs.

On the basis of the output, we Design the Truth Table of Half Adder as:

InputOutput
ABC0
0000
0110
1000
1111

 

Advantages of Half Adder

  1. Half Adders are the Basic basic Building Blocks to learn 1 bit addition.
  2. They are simple in Construction.
  3. Half Adders are easy to use.
  4. We can Get a Half Subtractor mere inverting the Circuit.

Disadvantage of Half Adder

  1. There is no mechanism to use the carry in the next addition.
  2. Can perform very specific functions.
  3. It may give the wrong output.

Accordingly, we learned many things about the Half Adders today. we saw what are adder, what are half Adders, What is the truth Table, Block Diagram of Half adder and How we implement it in the Proteus ISIS for the sake of Practical usage.

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