Hey pals! I wish you are doing great. Welcome to a new lesson about the Digital Logic Circuits in The Engineering Projects. In the past tutorials, we Designed the Basic JK Flip Flop. Today, we'll talk about the following Points:
What are JK Flip Flops?
What are the Master Slave Flip Flops?
How does the Circuit of Master Slave Flip Flop looks?
How types of JK Flip Flop different from each other?
How does the simulation of Master JK Flip Flip take place in Proteus ISIS?
Moreover, we'll also learn some key concepts in DID YOU KNOW portions. Yet Let's recall some points about the topic. Flip Flops are the building block of a huge number of electronic systems and devices. A Flip Flop is a Digital circuit that can take the bits as input, work with the bits, Store the bits and can output the bits. it has four basic types and at the moment we are discussing the JK Flip Flops.
DID YOU KNOW????????????
The basic JK Flip Flops face a condition where when both the Inputs are HIGH and the Clock remains HIGH for a long time, then the output of JK Flip Flop becomes uncertain and this situation is called Race around Condition in JK Flip Flops..
JK Flip Flops
As discussed in the Previous tutorial , we define the JK Flip Flops as:
"The JK Flip Flops are the Modification of Set-Reset Flip Flops that contain two outputs and are able to work with the Invalid Condition of Flip Flops."
There are mainly two types of JK Flip Flops:
Basic JK Flip Flops
Master Slave JK Flip Flops.
The main focus of this tutorial is Master JK Flip Flops so lets find what are they.
Master Slave JK Flip Flops
The Master Slave JK Flip Flops are considered better than Basic JK Flop and we define them as:
"Master Slave JK Flip Flop is two input two output sequential Logic Circuits that are the Combination of two Basic JK Flip Flops and work well even in Race around Condition of JK Flip Flops."
In Master Slave JK Flip Flops there are two JK Flip Flops that are connected in series. The 1st JK Flip flop is called the "Master" circuit and the other is called the "Slave" circuit. The output of the Master Circuit is connected with the inputs of Slave circuits. At the same token, the output from the Slave Circuit are then fed into the input terminals of Master Circuit.
The circuit also contain an Invertor that is Connected with the clock and slave circuit in such a way that the Slave circuit always contain the inverting clock signal as the master circuit. Hence when Master circuit get the clock HIGH, then the slave circuit get the LOW and vise Versa.
Difference of Basic JK Flip Flop and Master Slave JK Flip Flop
Both of the circuits belongs to the same family but they are different in many ways:
Basic JK Flip Flop contain only one circuit but Master Slave JK Flip Flop contains two.
The Basic JK Flip Flop have the Race around condition but Master Slave does not.
Basic JK Flip Flop is less complex than Master Slave JK Flip Flop.
Basic JK Flip Flop is less used than Master Slave JK Flip Flop.
Basic JK Flip Flop does not require any NOT Gate but Master JK Flip Flop use it.
Circuit of Master Slave JK Flip Flop
If we talk about the Circuit of the JK Flip Flop then it is always convenient to use the IC presented in Proteus ISIS. We'll show you the Circuit of Master Slave through ISIS but for the best concept and the working of the Circuit, we'll demonstrate the Logic Gate Circuit of Master Slave JK Flip Flop during the Simulation.
Let's have a look at the circuit of Master Slave JK Flip Flop with IC:
DID YOU KNOW???????????
When the condition of Master Slave Flip Flop is J=1 and K=1 then the values at Q and Q' remains change according to the flow of clock.
Working Mechanism of JK Flip Flops
It is important to understand how Master Slave Flip Flop works.
When the clock Pulse is set to be high, the circuit of Slave is isolated. The Slave circuit remains isolated until the Clock is high. At this position, the J and K have an effect at the output of the whole circuit.
When we set the J as LOW and S as HIGH. The output of Switch 4 (Look at the picture below) will goes to the 2nd Input of switch 6. In this Condition, the Slave circuit copies the Master circuit. Similarly, when you change the values of J and K then you will Get different outputs according to the condition of clock.
Simulation od Master Slave JK Flip Flop in Proteus ISIS
Fire up your Proteus Software.
Three input NAND Gate
Two input NAND Gate
Click the 'P" button and write NAND Gates, Logic Toggle, LED in the pop up window one after the other.
Arrange 2 three input NAND Gates at the Working area vertically.
Get 6 two input NAND Gate just according to the image given below:
Set three Logic Toggles vertically, at the start of Three input NAND Gates.
For the output device, use the Led and set them just after the last two NAND gates.
Go to Ground Terminal from the side of Proteus screen and choose Ground Terminal.
Set the Ground terminal just after the LEDs.
Place the NOT Gate just below the Three inputs NAND Gates.
Connect the whole system through wires as reported by the following picture:
NOTE: You can also use the CLOCK instead of the Logic toggles in the experiment but this was not suitable for the demonstration purpose for me.
Change the values of the toggle J,K and CLK one after the other to check the outputs.
This is the required circuit.
Truss today we saw what are the Flip Flops, what are the JK Flip Flops. We saw the types of JK Flip Flops and leaned how can we perform the Practical simulation of Master Slave JK Flip Flops.
I am Syed Zain Nasir, the founder of The Engineering Projects (TEP). I am a
programmer since 2009 before that I just search things, make small projects and now I am sharing my
knowledge through this platform. I also work as a freelancer and did many projects related to
programming and electrical circuitry. My Google Profile+Follow