Altium DISCUSSION

How should Altium net classes separate power, logic and sensitive analog signals?

Started by su Altium net classesPCB constraintsanalog routingpower tracesdesign review
3 replies 248 views 4 participants
Latest activity · 27 Sep 2026

How should Altium net classes separate power, logic and sensitive analog signals?

su Altium Forum
#1

For a mixed-signal sensor board, how would you organize constraints so a general routing rule does not accidentally govern every signal? The board has a motor-supply path, a low-level analog input and digital communication.

Which requirements belong in net classes, and which require a specific exception? How can the constraint setup remain understandable when another engineer reviews the design?

Reference: Altium: Constraint Manager (https://www.altium.com/documentation/altium-designer/sch-pcb/constraint-manager).

Community replies 3

Re: How should Altium net classes separate power, logic and sensitive analog signals?

#2

Group nets by an electrical or manufacturing requirement, not just by a convenient name prefix. The motor-supply path needs a current and temperature-rise assessment; the analog input may need separation from switching nodes and a suitable return path. Digital interfaces may have timing or impedance requirements. Write the reason for each class so a reviewer can judge whether its members belong there.

Re: How should Altium net classes separate power, logic and sensitive analog signals?

#3

A trace-width rule alone does not design the return-current path. Examine plane continuity, connector pinout, decoupling loops and where high-current paths share impedance with the sensor reference. If a 2 A transient crosses a shared 20 milliohm path, the resistive drop alone is 40 mV. That can matter greatly to a millivolt-level measurement, before considering inductive effects.

Re: How should Altium net classes separate power, logic and sensitive analog signals?

#4

Use specific exceptions only where the physical design requires them, such as a short package escape, and document their scope. Inspect the rules applying to representative objects and run DRC with the final copper fills. Keep constraints under version control with the design. A readable rule set makes it possible to distinguish a deliberate exception from an accidental inheritance.

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