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Raspberry Pi Pico DISCUSSION
A PIO clock divider gives the expected average output frequency, yet individual pulse periods are not identical. How should fractional clock division and instruction timing be considered when generating a timing-sensitive signal?
Reference: Raspberry Pi: Pico SDK hardware APIs (https://www.raspberrypi.com/documentation/pico-sdk/hardware.html).
A fractional divider achieves an average rate using a sequence of discrete system-clock intervals. This can matter when a receiver cares about individual edge spacing, not only average frequency. Review the divider behavior for the actual RP2040 or RP2350 configuration and include instruction delay cycles.
Measure the shortest and longest pulse widths over enough cycles to reveal the pattern. For a simple fixed-length loop, start with f_output = f_system / (divider × loop_cycles), adjusting for how many waveform periods the loop produces. Then analyze edge placement within that loop separately.
If the application's tolerance requires it, choose a system clock and integer divider that give the needed timing with an appropriate instruction sequence. Recheck other peripherals affected by a clock change. A high-resolution counter showing the correct average frequency is not proof that every pulse meets its width requirement.
