Simulating advanced logic gate NAND logic gate The NANA ladder logic in two ways NAND ladder logic when both inputs are false NAND ladder logic when input A is false and input B is true NAND ladder logic when input A is true and input B is false NAND ladder logic when both inputs are true NOR logic gate XOR logic gate XNOR logic gate XNOR ladder logic when input A is true and input B is false XNOR ladder logic when input A is false and input B is true