Hello Learners! Welcome to The Engineering Projects. In the previous tutorial, we discussed the first universal gate i.e. NOR Gate and simulated it in Proteus. Today, we are going to focus on the second universal gate i.e. NAND Gate. We will also derive basic logic gates from the NAND gate, to prove its universality.
Today, we'll seek the answers to the following questions:
What is a NAND Gate?What is a Universal Gate?
NAND as a Universal Gate.
NAND Gate as Universal Gate in Proteus ISIS.
Let's get started:
What is a NAND Gate?
A NAND Gate is designed by inverting the output of AND Gate and thus it gives a LOW output when all of its inputs are HIGH, otherwise, it's HGIH.In order to design a NAND gate, simply place a NOT gate in ...
Hello Learners! I hope you are doing great. Welcome to The Engineering Projects. In our previous lecture, we discussed How to design Half Adder with Universal Gates. In today's tutorial, we are going to design Full Adder with Logical Gates.
In today's tutorial, we will learn the complete information about:
What is Adder?
What is Full Adder?
How is the Truth Table of Full Adder?
How can we design Full Adder in Proteus ISIS?
What are the uses of Full Adder?
What is Adder?
Recalling from our previous lectures:The Adders are simple Logical Circuits that take the bits in as the input, sum the bits together and generate the sum and the carry at the output.Adders are present in computer architecture, mainly to control the ...
Hey pals, we hope you are doing well. In our previous lecture, we discussed the basic DLD Basic Logic Gates and simulated in Proteus. Today, we are going to discuss another logic gate called Exclusive OR Gate(XOR Gate). We will also design the XOR Gate in Proteus using the basic logic gates(i.e. AND, OR and NOT), discussed in the previous lecture.
In today's tutorial, we are going to focus on:
What are Exclusive OR Gates
Experimental Proof in Proteus ISIS.
How Truth Table of Exclusive OR Gate is designed.
How is its Timing Diagram?
Circuit of Exclusive OR Gate in Proteus Simulation
Applications of Exclusive OR Gates
Exclusive OR Gate(XOR Gate)
In the Exclusive OR Gate(XOR Gate), the output will be HIGH(1), only if the odd no. of inputs is HIGH(1) and at least one o ...
Hi mentees, we are here with a new tutorial. I hope you all are fine. So far, we have been designing combinational circuits i.e. Adder, Subtractor, Multiplexer etc. using logic gates. But from today onward, we will design sequential circuits using logic gates i.e. Latches, Flip Flops etc. Let's quickly recall what's the difference between combinational & Sequential Circuits:
Combinational Circuits:
Combinational circuits only use the current state of the input values to generate the output.Examples of DLD Combinational Circuits are: Adders, Subtractors, Multiplexers etc.
Sequential Circuits
Sequential Circuits use both the current & previous states of the inputs to generate the output.Examples of DLD Sequential Circuits are: Latches, Flip Flops, Timers, Counters etc.
Digital M ...
Hey Mentees! Welcome from the team of The Engineering Projects. We hope You are having a reproductive day. To add more reproduction, let's learn another Logical Circuit from scratch.
In this Tutorial, we'll grasp the following topics:
What are D-Type Flip Flop?
Which is the IC of D Flip Flop in Proteus ISIS?
How is the working of D Flip Flop?
How can we design the Truth Table of D Flip Flop?
How can we Perform the formation of D Flip Flops in Proteus ISIS?
Moreover, we'll have small chunks of information in DID YOU KNOW Sections. At this instance, Let's start the learning.
D-Type Flip Flops
D-Type Flip Flops are important Logical Circuits and we Introduce it as:
"The D-Type Flip Flop is a type of Flip Flop that captures the value of D ...
Hello Pupils! I welcome you to The Engineering Projects. I hope you are having a good day. In our previous lectures, we simulated almost all the DLD Logic Gates i.e. AND, OR, NOT, NOR, NAND, XOR and XNOR. I hope now you must have a complete understanding of the logic gates and their working.
Now, it's time to have a look at the reason for inventing these logic gates. These DLD logic gates are used to design different numerical modules i.e. adder, subtracter, multiplexer, de-multiplexer, encoder, decoder etc. These arithmetic modules are normally used in electronic products i.e. a simple microcontroller has numerous adders/subtractors for properly calling the registers' addresses.
So, from today onward, we are going to discuss these applications of logic gates one by one. Today, we wi ...
Hi Mentees! I welcome you on behalf of The Engineering Projects. In this section of this DLD Logic gates series, we are discussing different applications of logic gates. We have discussed DLD Adders and Subtractors in our previous lectures and now it's time to have a look at DLD Multiplexers.
What are Multiplexers?
What are the types of Multiplexers?
What are the two input Multiplexers?
How can we simulate the Circuit of 2 to 2 MUX in Proteus ISIS?
How can we use the 2 to 1 MUX as OR, AND and NOT gates?
What are Multiplexers?
When I heard the word Multiplexer, I thought that as Adder adds numbers, Subtractor subtracts numbers, similarly, the Multiplexer will multiply binary numbers but that's not the case. Multiplexer is defined as:
A Multiplexer(also called MUX or ...
Hey Pals! We hope you are doing Great. Today, we are going to design another application of DLD Logical Gates i.e. Half Subtractor. In our previous lectures, we covered Adders in detail, where we studied both Half Adders & Full Adders. Now its time to discuss its reciprocal i.e. Subtractors.
In this session, we'll seek the answers to the following topics:
What is Half Subtractor?
Working Principle of Half Subtractor.
Truth-table of Half Subtractor.
Simulation of Half Subtractor in Proteus using three Logic Gates.
Designing of Half Subtractor with NOR gate.
So, let's get started:
What is Subtractor?The functionality of Subtractors is exactly the opposite of Adders(we discussed in previous lectures) and defined as:A Subtractor is a simple DLD Electronic circuit, d ...
Hey Learners! I welcome you on the behalf of The Engineering Projects. I hope you are doing Great. If you are seeking for the best information about the T Flip Flop along with some small concepts and the Practical Performance, then you are at the right article. In this session you will get the following topics:
What are T Flip Flops?
What are the Functions of Preset and Clear Input in T Flip Flop?
How can we Design the Truth Table of T Flip Flop?
How can you perform the T Flip Flop simulation in very simple and useful way?
Moreover, you will also get some pieces of information in DID YOU KNOW sections. so without wasting time, lets Jump into the answer of 1st Question.
T Flip Flop
T Flip Flop belongs to the family of Flip Flops and Latche ...
Hello Learners! welcome from the team of The Engineering Projects. We hope you are having a productive day. We are working on a series of Blogs based upon the core knowledge about Digital Logic Gates and Circuits. In this tutorial, we'll know about the SR Flip Flops and after brief introduction we will simulate SR Flip Flops in Proteus. Let's have a glimpse on the topics of today:
What are Flip Flops?
What are the types of Flip Flop?
How does we design the Truth Table of SR Flip Flops?
What are further classes of SR Flip Flips?
Implementation of SR Flip Flops in Proteus.
Flip Flops
Flip Flops are extremely important Circuits of Digital Logic Design. We Introduce the Flip Flops as:
"Flip Flops are type of sequential Logic Circuit that co ...
