Hello Learner! I hope you are doing great. Welcome to another tutorial at The Engineering Projects. This blog is the part of series we have stated about the Digital Logic Circuits. Previous to this, we learned Implementation of SK Flip Flops in Proteus. at the present day, we'll seek the knowledge about the following points:
What are Flip Flops?
What are JK Flip Flops?
How can we record the Truth Table of JK Flip Flops?
What is the Procedure to Construct the circuit of JK Flip Flop through Logic Gates and IC circuit?
Moreover, we'll also have some useful bits of Information in Did you know Sections. Let' see the explanation of the concepts given above.
Flip Flops
The Flip Flops are the building blocks of many of the Electronic Circuits. ...
Hello Learners! welcome from the team of The Engineering Projects. We hope you are having a productive day. We are working on a series of Blogs based upon the core knowledge about Digital Logic Gates and Circuits. In this tutorial, we'll know about the SR Flip Flops and after brief introduction we will simulate SR Flip Flops in Proteus. Let's have a glimpse on the topics of today:
What are Flip Flops?
What are the types of Flip Flop?
How does we design the Truth Table of SR Flip Flops?
What are further classes of SR Flip Flips?
Implementation of SR Flip Flops in Proteus.
Flip Flops
Flip Flops are extremely important Circuits of Digital Logic Design. We Introduce the Flip Flops as:
"Flip Flops are type of sequential Logic Circuit that co ...
Hello Learners, hope you are doing well. I am here with a new tutorial. We'll discuss about Junction Field Effect transistors. In this tutorial, we will learn the basic Introduction to JFET nad will also have a look at its practical Implementation and simulation in Proteus.
Basically, Junction Field Effect is a type of transistor, similar to Bipolar Junction Transistors but they have different characteristics due to some reasons as discussed below:
Introduction to JFET
We Define the JFET as:
"Junction Field Effect transistors or simply JFET is the semiconductor ,Voltage Control, three terminal device that is present in both configurations either N channel or P channel."
JFET are named so because the the operation of JFET relies on the Field of th ...
Hello Pupils! I welcome you to The Engineering Projects. I hope you are having a good day. In our previous lectures, we simulated almost all the DLD Logic Gates i.e. AND, OR, NOT, NOR, NAND, XOR and XNOR. I hope now you must have a complete understanding of the logic gates and their working.
Now, it's time to have a look at the reason for inventing these logic gates. These DLD logic gates are used to design different numerical modules i.e. adder, subtracter, multiplexer, de-multiplexer, encoder, decoder etc. These arithmetic modules are normally used in electronic products i.e. a simple microcontroller has numerous adders/subtractors for properly calling the registers' addresses.
So, from today onward, we are going to discuss these applications of logic gates one by one. Today, we wi ...
Hello Pupils! I welcome you to The Engineering Projects. I hope you are having a good day. In our previous lecture, we discussed Half-Adder Circuit Designing with XOR and AND logic gates. Today, we are going to design the same circuit using universal logic gates i.e. NOR and NAND gates.We are going to learn the following topics, in today's lecture:
What is Adder?
What is Half Adder?How can We make Half Adder Circuit through NAND Gate?
How can We make Half Adder through just NOR Gate?
Hence without wasting time, Let's find all the Answers.
What is Adder?As we discussed in the last lecture, the DLD Adder is a simple electronic circuit, used to add binary numbers in bit form.There are two types of DLD Adders, named:
Half Adder
Full Adder
In this article, we'll f ...
Hello Learners! Welcome to The Engineering Projects. In the previous tutorial, we discussed the first universal gate i.e. NOR Gate and simulated it in Proteus. Today, we are going to focus on the second universal gate i.e. NAND Gate. We will also derive basic logic gates from the NAND gate, to prove its universality.
Today, we'll seek the answers to the following questions:
What is a NAND Gate?What is a Universal Gate?
NAND as a Universal Gate.
NAND Gate as Universal Gate in Proteus ISIS.
Let's get started:
What is a NAND Gate?
A NAND Gate is designed by inverting the output of AND Gate and thus it gives a LOW output when all of its inputs are HIGH, otherwise, it's HGIH.In order to design a NAND gate, simply place a NOT gate in ...
Hi Mentees! I hope you all are having a Productive Day. In our previous lecture, we discussed the DLD Basic Logic Gates and simulated them in Proteus. Today, we are going to use these standard logic gates and will design another logic gate named NOR Gate and will also simulate it in Proteus.
In this tutorial, we'll learn the following concepts:
What is a NOR Gate?Why NOR is called Universal Gate?
How to derive other Gates through NOR Gate?
Advantages of NOR Gate.
Let's begin the exploration:
What is a NOR Gate?"NOR gate is designed by inverting the output of an OR Gate, so it gives a HIGH output, only when all the inputs are LOW."In simple words, a NOR Gate has an OR Gate followed by the NOT Gate, as shown in the below figure:
...
Hey pals, we hope you are doing well. In our previous lecture, we discussed the basic DLD Basic Logic Gates and simulated in Proteus. Today, we are going to discuss another logic gate called Exclusive OR Gate(XOR Gate). We will also design the XOR Gate in Proteus using the basic logic gates(i.e. AND, OR and NOT), discussed in the previous lecture.
In today's tutorial, we are going to focus on:
What are Exclusive OR Gates
Experimental Proof in Proteus ISIS.
How Truth Table of Exclusive OR Gate is designed.
How is its Timing Diagram?
Circuit of Exclusive OR Gate in Proteus Simulation
Applications of Exclusive OR Gates
Exclusive OR Gate(XOR Gate)
In the Exclusive OR Gate(XOR Gate), the output will be HIGH(1), only if the odd no. of inputs is HIGH(1) and at least one o ...
Hello Mentees!, I hope you have a productive day. Welcome to The Engineering Projects. In the previous lecture, we discussed the XOR Logic Gate and designed its circuit using basic logic gates i.e. AND, OR and NOT. Today, I am going to explain another Logic Gate named XNOR Gate in detail.We are going to discuss these concepts in today's lecture:
What are Exclusive NOR Gates
Experimental Proof in Proteus ISIS.
How Truth Table of Exclusive NOR Gate is designed.
How is its Timing Diagram?
Circuit of Exclusive NOR Gate in Proteus Simulation
Applications of Exclusive NOR Gates
XNOR Gate
The exclusive NOR Gate(also called XNOR Gate) simply inverts the output of the XOR Gate(we discussed in the last lecture).So, if we simply place a NOT Gate in front of the XOR Gate, we wi ...
Hi Learners! I hope you are having a productive Day. Welcome from the Team of The Engineering Projects. The digital logic circuit that we are learning today is 4-Bit Full Adder. In our previous tutorial, we designed 2-Bit Full Adder using Logic Gates in Proteus software. Today, we are going to design & simulate 4-Bit Full Adder using Logic Gates in Proteus.
We will discuss the following topics in today's lecture:
What is Adder?
What is Full Adder?
Working Principle of 4-bit Full Adder.
Simulation of four-bit full Adder in Proteus ISIS.
What is Adder?
Let's recall the Adder Definition from our previous lectures:
Adders are Digital Logical Circuits, specially designed to add two or more binary numbers or bits.In the world o ...
